FPGA Final Year Projects for Electronics Students

The terminology “VLSI” could be abbreviated as Very-Large Scale Integration Technology. As the name suggests, it indulges the integration of several thousands of devices to make one or more Integrated Circuits to suit whatever the need is. If the concepts of VLSI could be utilized to the core, then the space constraint and the power utilization in many of the modern age devices could also be redressed. Though VLSI itself is a sub-domain in the electronics domain, it hosts a pool of possibilities to improvise the current capabilities of any digital circuitry system. Some of the areas of interest in the VLSI sub-domain are as follows:

• Deployments of Application-Specific Integrated Circuit

• Field Programmable Gate Array applications

• System on a Chip utilizations

• Wider tools utilization like Xilinx, Xilinx ISE, Xilinx Vivado, etc.

Top 10 VLSI Projects using Xilinx Software for ECE Students

Due to the wider utilization of Xilinx-based software, here we present VLSI projects using Xilinx software for the students who wish to do their projects in this genre.

1. Approximate Pruned and Truncated Haar Discrete Wavelet Transform VLSI Hardware for Energy-Efficient ECG Signal Processing

Approximate Pruning and Truncating of the Harr Discrete typed wavelet transform could be utilized to improvise the current VLSI configurations and features supporting the processing of ECG-based signals in healthcare-related applications with the help of Xilinx. 

2. Implementation of FPGA signed multiplier using different adders

For achieving a tradeoff intermediary to the delay and area, several adders like CSA, CLA, HCA, and BKA could be utilized for improvising on the signed multiplying operation with the help of Xilinx and FPGA-Field Programmable Gate Arrays.

3. Low Error Efficient Approximate Adders for FPGAs

LUT arrangement-based 2-bitted adders containing approximate sections and accurate sections could be utilized in the FPGA-Field Programmable Gate Arrays for the sake of lessening the errors in it. Additionally, these adders could be power and area efficient.

4. A Reliable Approach to Secure IoT Systems using Cryptosystems Based on SoC FPGA Platforms

A malware-avoiding IoT system perspective protection system could be developed by improvising both the software and hardware. By using Xilinx software, the hardware cryptosystem-oriented Field Programmable Gate Arrays could be improved to impart increased security to the devices and users in the IoT environment. 

5. The Constant Multiplier FFT

FFT-Fast Fourier Transform deployment perspective arrangement of a uniform multiplier could be drafted with the help of Xilinx software and Radix. The said multiplier could be optimized enough to operate depending upon the taken twiddle factor.

6. Design of Approximate Multiplier less DCT with CSD Encoding for Image Processing

Drafting of the DCT- Discrete Cosine Transform without the multipliers could be made with the encode being done with the help of CSD- Canonical Signed Digit. This novel drafting could be made to have two approximating methodologies in it.

7. A Novel Approximate Adder Design using Error Reduced Carry Prediction and Constant Truncation

With the help of Xilinx software, the innovative drafting of the adder could be attempted by the utilization of constant truncating and predicting. Due to this innovative adder design, the energy, power, and improvisations in ADP systems might be realized.

8. Virtex 7 FPGA Implementation of 256 Bit Key AES Algorithm with Key Schedule and Sub Bytes Block Optimization

As the modern age communication systems need sudden and much-needed developments in it, the need for securing those developed technologies also must be done simultaneously. Thus, improvisation of the current security output could be done by establishing the optimization with the recycling of the S-box block and the concept of AES- Advanced Encryption Standard.

9. Constant-time Synchronous Binary Counter with Minimal Clock Period

A sorting network-based quick synchronizing binary counting device containing the least possible clock time could be devised. These binary counters utilized in the network could be (15,4), (7,3), and (31,5). Also, the approximating and accurate 4-2 compressing device could also be utilized in order to improvise the current capabilities of the counter. 

10. Design and Analysis of Approximate Compressors for Balanced Error Accumulation in MAC Operator

With the help of several multipliers and adders, a power-effective approximating MAC arrangement could be developed. With slight modification being done in the Boolean expressions in the currently available compressing devices, the accumulation of errors in the said proposed arrangement could be balanced as intended.

Also read : Arduino Based Projects List

Other Few VLSI Projects using Xilinx Software

While we have already discussed 10 projects that we utilized Xilinx in some way or other, we furthermore list other few projects that tend to utilize Xilinx Software.

• A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation 

• High performance IIR filter implementation on FPGA

• Design of Low-Power Wallace Tree Multiplier Architecture Using Modular Approach 

• Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications 

• Optimal Architecture of Floating-Point Arithmetic for Neural Network Training Processors 

• Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits 

• A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wireless Sensor Networks 

• An Efficient and High-Speed Overlap-Free Karatsuba-Based Finite-Field Multiplier for FGPA Implementation 

• A Fully Synthesizable All-Digital Phase-Locked Loop with Parametrized and Portable Architecture 

• Design and Implementation of Arbitrary Point FFT Based on RISC-V SoC 

• SAM: A Segmentation based Approximate Multiplier for Error Tolerant Applications 

• Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic 

• Design and Verification of 16 bit RISC Processor Using Vedic Mathematics 

• Design of Very High-Speed Pipeline FIR Filter Through Precise Critical Path Analysis 

• Fast Mapping and Updating Algorithms for a Binary CAM on FPGA 

• A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low Power Applications 

• Design of Ultra-Low Power Consumption Approximate 4-2 Compressors Based on the Compensation Characteristic 

• Fast Binary Counters and Compressors Generated by Sorting Network 

• Shadow: A Lightweight Block Cipher for IoT Nodes 

• DS2B: Dynamic and Secure Substitution Box for Efficient Speech Encryption Engine 

• Design Optimization for Low-Complexity FPGA Implementation of Symbol-Level Multiuser Precoding 

• RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Nonvolatile Main Memory 

• A High-Performance Multiply-Accumulate Unit by Integrating Additions and Accumulations into Partial Product Reduction Process 

• Ultra-high Compression of Twiddle Factor ROMs in Multi-core DSP for FMCW Radars 

• An Efficient Modified Distributed Arithmetic Architecture Suitable for FIR Filter 

• High-Speed Area-Efficient VLSI Architecture of Three-Operand Binary Adder 

With FGPA, almost every application benefits from it because of the flexibility that it imparts to its user to make any kind of modifications suiting their needs. Thus, we list 4 of those FPGA projects for your reference below. 

• Implementation of Efficient Modulo 2nAdders for Cryptographic Applications 

• A Systematic Delay and Power Dominant Carry Save Adder Design 

• Image Enhancement using Edge Spartan 6 FPGA Board 

• An Efficient Way of Implementing High Speed 4-Bit Advanced Multipliers in FPGA 

Alongside the major projects with Xilinx, we also list some ECE mini projects using Xilinx. Those Xilinx based mini projects are as follows:

• Performance Evaluation of Fixed-point Array Multipliers on Xilinx FPGAs 

• Design of Delay Efficient Hybrid Adder for High Speed Applications 

• Low Power 4-Bit Arithmetic Logic Unit using Full-swing GDI Technique 

• A Low-Power Yet High-Speed Configurable Adder for Approximate Computing 

• FPGA Implementation of Matrix-Vector Multiplication using Xilinx System Generator 

• Factorized Carry Look Ahead Adder 

• Reseeding LFSR for Test Pattern Generation

• Design of Majority Logic (ML) Based Approximate Full Adders

• Efficient FIR Filter Design using Booth Multiplier for VLSI Applications 

• Performance Analysis of Wallace Tree Multiplier with Kogge Stone Adder using 15-4 Compressor 

• Power-Efficient Approximate SAD Architecture with LOA Imprecise Adders 

• Binary to Gray Code Converter Implementation using QCA 

• Area and Power Efficient VLSI Architecture of Distributed Arithmetic Based LMS Adaptive Filter 

• Energy-Efficient Approximate Multiplier Design using Bit Significance-Driven Logic Compression 

• Image and Video Processing Applications using Xilinx System Generator 

• Design and Simulation of CRC Encoder and Decoder using VerilogHDL 

• Chip Design for Turbo Encoder Module for In-Vehicle System 

• Efficient Implementations of 4-Bit Burst Error Correction for Memories

• Low Power 1-Bit Full Adder using Full-Swing Gate Diffusion Input Technique 

• Machine Learning Based Power Efficient Approximate 4:2 Compressors for Imprecise Multipliers 

• Design of High Speed Carry Select Adder using Brent Kung Adder 

• A Low Power Reconfigurable LFSR 

• Scalable Construction of Approximate Multipliers with Formally Guaranteed Worst Case Error 

• Logic Synthesis in Reversible PLA 

• Low-Power Approximate MAC Unit 

• A Novel Data Format for Approximate Arithmetic Computing 

• Design of Low Power Magnitude Comparator 

• Area-Delay Efficient Binary Adders in QCA 

• Area–Delay–Power Efficient Carry-Select Adder 

Takeoff projects being one of the best academic projects institutions in India hosts several domain experts who can help with whatever your project needs are. Also, they have VLSI experts, who can support you in any part of your project, be it the idea creation or implementation, generation of results, etc.