Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic
Also Available Domains Arithmetic Core|Xilinx ISE
Abstract
In this paper, we proposes an inexact Baugh-Wooley Wallace tree multiplier with novel architecture for inexact 4:2 compressor optimized for realization using reversible logic. The efficacy of the proposed reversible logic based realization of the proposed inexact 4:2 compressor and Baugh-Wooley Wallace tree multiplier is measured in scales of Gate Count (GC), Quantum Cost (QC), Garbage Output (GO) and Ancilla Input (AI). An 8 × 8 Baugh-Wooley Wallace tree multiplier is implemented in this paper. To Enhance the speed of operation, the reversible logic gates are utilized on the partial product reduction part in multiplier. The proposed multiplier is utilized in two applications 1) image processing - one level decomposition using rationalized db6 wavelet filter bank and image smoothing and 2) Convolutional Neural Networks (CNN). The effectiveness of the proposed method is synthesized and simulated using Xilinx Vivado 2018.3
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Block Diagram
Specifications
Software Requirements:
- Xilinx Vivado Tool
- HDL: Verilog
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
- Basics of Digital Electronics
- VLSI design Flow
- Introduction to Verilog Coding
- Different modeling styles in Verilog
- Data Flow modeling
- Structural modeling
- Behavioral modeling
- Mixed level modeling
- Introduction to Arithmetic circuits
- Knowledge on types of approximate compressor circuits
- Different multipliers
- Knowledge on compressors and inexact computation
- Applications in real time
- Xilinx Vivado for design and simulation
- Generation of Netlist
- Solution providing for real time problems
- Project Development Skills:
- Problem Analysis Skills
- Problem Solving Skills
- Logical Skills
- Designing Skills
- Testing Skills
- Debugging Skills
- Presentation Skills
- Thesis Writing Skills
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