DS2B: Dynamic and Secure Substitution Box for Efficient Speech Encryption Engine

Also Available Domains Xilinx ISE|Communications and Crypto Core

Project Code :TVPGTO567

Abstract

The Dynamic and Secure Substitution Box (DS2B) design suitable for IoT and resource-constrained platforms for efficient encryption. The DS2B has the advantages of simple structure and good encryption performance. A different number of strong S-boxes could be generated with minor variations in the DS2B parameters. Performance analyses of the DS2B, including differential/linear cryptanalysis, bijective, nonlinearity, Strict Avalanche Criterion (SAC), and Bit Independence Criterion (BIC) have been presented where high nonlinearity, and low differential uniformity are achieved. Besides, a comparison with recent S-boxes is introduced which shows the robustness of the DS2B. To verify the DS2B, a speech encryption engine was realized on FPGA. In this work, the silence periods are encrypted in a way that makes them much harder to detect using the DS2B. The proposed encryption scheme achieved a high throughput which is higher than previous work.

Keywords: FPGA, S-box, speech encryption, cryptanalysis, dynamic.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

Xilinx Vivado Tool
HDL: Verilog

Hardware Requirements:

Microsoft® Windows XP,
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Basics of Digital Electronics
FPGA design Flow
Introduction to Verilog Coding
Different modeling styles in Verilog

Data Flow modeling
Structural modeling
Behavioral modeling
Mixed level modeling

Concept of Cryptography systems
Importance of Speech encryption
Drawbacks of existing methods
Introduction to DS2B
Knowledge on Key based and Key less encryption
Applications of DS2B in real time
Study on LUT based S-box generation
Scope of DS2B concept in today’s world
Applications in real time
Xilinx Vivado for design and simulation
Generation of Netlist
Solution providing for real time problems
Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation Skills
Thesis Writing Skills

Demo Video

Front End Domains

DSP Core
Communications and Crypto Core
Design for Testability
Arithmetic Core
Nano Technology

Back End Domains

Nano Technology
Core Memories
Transistor Logic
Low Power VLSI

Tools

Cadence EDA
Xilinx Vivado
Xilinx ISE
Tanner EDA
FPGA

Others

Matlab Interfacing