VLSI Synthesis of Multiply and Accumulate Structures Using Distributed Arithmetic

Project Code :TVMAFE593

Objective

This paper shows how the parameter of inputs in the data path affects different MAC cores.

Abstract

This paper introduces a comprehensive study on the Very Large Scale Integration (VLSI) synthesis of Multiply and Accumulate (MAC) structures employing the innovative concept of Distributed Arithmetic (DA). MAC operations are fundamental in digital signal processing and are widely used in applications such as filters, transforms, and neural networks. The synthesis of efficient MAC units plays a pivotal role in achieving high-performance computing systems.

The key innovation in this research lies in the utilization of Distributed Arithmetic, a technique that redistributes the computational workload, resulting in compact and area-efficient MAC units. The proposed approach optimizes the use of on-chip resources by minimizing the need for complex multipliers, thus significantly reducing silicon area and power consumption.

Top of Form

Keywords—Distributed Arithmetic (DA), 1BAAT (One Bit at a Time), 2BAAT (Two Bit at a Time), LUT (Look-Up Table), General Purpose Processor (GPP)

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

  • Tool: Xilinx Vivado
  • HDL: Verilog

Hardware Requirements:

  • Microsoft® Windows XP
  • Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
  • 512 MB RAM
  • 100 MB of available disk space

Learning Outcomes

·         Introduction to digital & analog electronics

·         Understanding of VLSI Concepts

·         Understanding of Digital Signal Processing

o   MAC Unit Architecture

o   Distributed Arithmetic Principles

·         Knowledge on Verilog

·         Simulation & Verification

·         Testing & Debugging skills

·         Real world Applications

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