Scalable Low-Cost Sorting Network with Weighted Bit-Streams

Project Code :TVMAFE572

Objective

The main aim of this work is to implement new sorting algorithm in order to reduce area.

Abstract

Sorting is a fundamental function in many applications from data processing to database systems. For high performance, sorting-hardware based sorting designs are implemented by conventional binary or emerging stochastic computing (SC) approaches. Binary designs are fast and energy-efficient but costly to implement. SC-based designs, on the other hand, are area and power-efficient but slow and energy-hungry. So, the previous studies of the hardware-based sorting further faced scalability issues. In this work, we propose a novel scalable low-cost design for implementing sorting networks. We borrow the concept of SC for the area- and power efficiency but use weighted stochastic bit-streams to address the high latency and energy consumption issue of SC designs. A new lock and swap (LAS) unit is proposed to sort weighted bit-streams. The LAS-based sorting network can determine the result of comparing different input values early and then map the inputs to the corresponding outputs based on shorter weighted bit-streams. Experimental results show that the proposed design approach achieves much better hardware scalability than prior work. Especially, as increasing the number of inputs, the proposed scheme can reduce the energy consumption by about 3.8% - 93% compared to prior binary and SC-based designs.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

· Xilinx ISE14.7 Suite/Vivado2018.3 Tool.

· HDL: Verilog.

Hardware Requirements:

· Microsoft® Windows XP.

· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support.

· 512 MB RAM.

· 100 MB of available disk space.

Learning Outcomes

Understanding voltage level shifting: Gain knowledge about the concept of voltage level shifting and its importance in electronic systems. Learn about the challenges and considerations involved in converting voltage levels between different supply voltages.
Familiarity with dual-supply applications: Explore the specific requirements and characteristics of dual-supply applications. Understand why and when dual-supply configurations are used and the benefits they offer in certain scenarios.
Knowledge of existing voltage level shifting techniques: Study various existing techniques and approaches for voltage level shifting in dual-supply applications. Understand their advantages, limitations, and trade-offs in terms of speed, power efficiency, area utilization, and performance.
Analyzing the high-speed requirement: Gain insights into the need for high-speed voltage level shifters in certain applications. Understand the implications of high-speed requirements on power consumption, signal integrity, and overall system performance.
Investigating power efficiency: Explore the significance of power efficiency in voltage level shifting designs. Learn about low-power design techniques, such as power gating, supply voltage scaling, and optimizing circuit topologies, to achieve power-efficient operation.
Designing a high-speed and power-efficient voltage level shifter: Apply the knowledge gained to design a voltage level shifter that meets the requirements of high speed and power efficiency in dual-supply applications. Understand the design considerations, trade-offs, and challenges involved in achieving these objectives.
Simulation and analysis: Utilize simulation tools and techniques to validate the design, analyze its performance, and assess its speed and power efficiency. Gain hands-on experience in simulating and analyzing the behavior of voltage level shifters under different operating conditions.
Evaluating trade-offs: Develop the ability to evaluate trade-offs between speed, power efficiency, area utilization, and other performance metrics. Understand how design choices and optimization strategies impact these trade-offs and make informed decisions based on the specific requirements of the application.
Documentation and reporting: Develop effective communication skills by documenting the design process, results, and findings in a clear and concise manner. Prepare a comprehensive report summarizing the design, implementation, and performance analysis of the high-speed and power-efficient voltage level shifter.
Critical thinking and problem-solving: Enhance critical thinking and problem-solving skills by identifying and addressing challenges and limitations in the design process. Explore alternative solutions, evaluate their feasibility, and propose improvements or optimizations to enhance the speed and power efficiency of the voltage level shifter