Secure Visual Data Processing: Image Encryption and Decryption through Reversible Logic Gates in VLSI Design
Objective
To design a secure image encryption and decryption system using reversible logic gates in VLSI design. The paper aims to address challenges like high area and power requirements in cryptography systems by optimizing for low power consumption while maintaining high security standards.
Abstract
ABSTRACT:
This paper explores the fascinating field of reversible logic synthesis and testing, which is crucial for quantum computing and low-power design. Among other fields, reversible calculations are used in digital signal processing, quantum computing, nanotechnology, and bio-information; hence, strong encryption systems are required to protect against prevent unwanted access and guarantee the privacy of data. This paper presents a novel solution, the Reversible Logic Gates Cryptography Design (RLGCD), to common problems including high space and power needs in secure cryptography methods. Using a Linear Feedback Shift Register to produce encryption and decryption keys, RLGCD is skilled at creating both encryption and decryption structures. Least Significant Bit (LSB) watermarking is used to strengthen data security. The study assesses the RLGCD architecture's FPGA performance and finds notable improvements over traditional systems, representing a major advancement in the development of effective and safe cryptographic solutions.
KEYWORDS:
Reversible Logic, Cryptography, Quantum Computing, FPGA Performance, LSB Watermarking.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Specifications:
Software Requirements:
• Xilinx ISE Tool
• HDL: Verilog
Learning Outcomes
Learning Outcomes:
- Basics of Digital Electronics.
- Concept of encryption and decryption algorithm scheme
- Knowledge on reversible gates
- Introduction to Verilog Coding.
- Different modeling styles in Verilog.
o Data Flow modeling.
o Structural modeling.
o Behavioral modeling.
o Mixed level modeling.
- About cryptography.
- Knowledge on composite field.
- Applications in real time.
· Xilinx Vivado 2018.3/Xilinx ISE 14.7 Suite for design and simulation.
· Generation of Net list.
· Solution providing for real time problems.
· Project Development Skills:
o Problem Analysis Skills.
o Problem Solving Skills.
o Logical Skills.
o Designing Skills.
o Testing Skills.
o Debugging Skills.
o Presentation Skills.
o Thesis Writing Skills.
Related Projects
Paper Publishing
Request Call Back
Would you like to receive a free callback now?
Choose the best time for callback:
Leave your message and we will contact you as soon as possible
6-2-85/B, Old Maternity Hospital Road, Thyagaraja Nagar, Tirupati, Andhra Pradesh – 517501
+91 9030333433
+91 9393939065
0877-2261612
Disclaimer - Takeoff Edu Group Projects are not associated or affiliated with IEEE in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, not projects of or by IEEE.
