Integration of SPI with AXI Protocol

Project Code :TVMAFE581

Objective

The main objective of this project is to integrate the SPI protocol using AXI

Specifications

           Processor               -    Pentium –II

 

Speed                                -    1.1 GHz

RAM                                 -    1 GB (min)

Hard Disk                          -   40 GB

Floppy Drive                     -    1.44 MB

Key Board                         -    Standard Windows Keyboard

Mouse                                -    Two or Three Button Mouse

Monitor                              -    SVGA

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Related Topics
  • Arithmetic Core
  • Communications
  • DSP Core
  • FPGA
  • Core Memories
  • Low Power VLSI
  • Transistor Logic
  • Nano Technology
  • Xilinx ISE
  • FPGA
  • Cadence EDA
  • Xilinx Vivado
  • Matlab Interfacing

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