Design & Verification of Reconfigurable SRAM Controller with AMBA AXI Protocol Interface for Automobile Application

The Static Random Access Memory SRAM Controller with AXI is intended to improve the read/write memory access time and internal connectivity of the semiconductor. Static random-access memory is used by one shared bus, with the aid of Advanced Microcontroller Bus Architecture AMBA. Utilizing System Verilog technology, the system's functionality of SRAM with AXI is ensured. The SRAM, which is designed is reconfigurable to different memory and AXI data and address widths. All of the modules in SV's basic test framework are hardwired to one another, which limits reusability. Industrial standard utilizes the Universal Verification Methodology UVM as its standard verification methodology. It reflects quick developments that allow the user to design reliable and reusable test bench components and verification intellectual property. In hardware modelling of an automobile, SRAM plays a vital role in memory. Even though SRAM is more expensive, it is faster and uses significantly less power compared to DRAM. SRAM can be used where either bandwidth or lower or both are principal constraints. SRAM is easier to control and also to interface. Since SRAM is less dense, it is used in automotives. SRAM has a high-speed serial interface with the processor through AXI and with the peripherals through APB. By offering a scalable, power-efficient, and AXI-compliant SRAM controller, this work advances automotive memory management and guarantees improved system performance and reliability.