▷ VLSI Projects Using Verilog for M.Tech

S.no	Project Code	Project Name
1	TVPGTO762	Optimal Architecture of Floating-Point Arithmetic for Neural Network T... Xilinx Vivado
2	TVPGTO777	Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate
3	TVPGTO753	Analysis of High Speed Hybrid Full Adder
4	TVPGTO760	Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits Xilinx Vivado
5	TVPGTO747	Design of Low-Power Wallace Tree Multiplier Architecture Using Modular... Xilinx Vivado\|Xilinx ISE
6	TVPGTO705	A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc... Xilinx Vivado
7	TVPGTO719	Implementation of FPGA signed multiplier using different adders Xilinx Vivado
8	TVPGTO715	Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli... Xilinx Vivado
9	TVPGTO699	A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel... Xilinx Vivado
10	TVPGTO697	Design of DDS Signal Generator Based on FPGA Xilinx Vivado

Items per page:

1 – 10 of 70

Project Code: TVPGTO762

Project Title:Optimal Architecture of Floating-Point Arithmetic for Neural Network Training Processors

Xilinx Vivado

View Details

Project Code: TVPGTO777

Project Title:Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate

View Details

Project Code: TVPGTO753

Project Title:Analysis of High Speed Hybrid Full Adder

View Details

Project Code: TVPGTO760

Project Title:Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits

Xilinx Vivado

View Details

Project Code: TVPGTO747

Project Title:Design of Low-Power Wallace Tree Multiplier Architecture Using Modular Approach

Xilinx Vivado| Xilinx ISE

View Details

Project Code: TVPGTO705

Project Title:A New Image Encryption Algorithm Based on Single S-Box and Dynamic Encryption Step

Xilinx Vivado

View Details

Project Code: TVPGTO719

Project Title:Implementation of FPGA signed multiplier using different adders

Xilinx Vivado

View Details

Project Code: TVPGTO715

Project Title:Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications

Xilinx Vivado

View Details

Project Code: TVPGTO699

Project Title:A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wireless Sensor Networks

Xilinx Vivado

View Details

Project Code: TVPGTO697

Project Title:Design of DDS Signal Generator Based on FPGA

Xilinx Vivado

View Details

Items per page:

1 – 10 of 70

S.no	Project Code	Project Name
1	TVPGTO762	Optimal Architecture of Floating-Point Arithmetic for Neural Network T... Xilinx Vivado
2	TVPGTO777	Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate
3	TVPGTO753	Analysis of High Speed Hybrid Full Adder
4	TVPGTO760	Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits Xilinx Vivado
5	TVPGTO747	Design of Low-Power Wallace Tree Multiplier Architecture Using Modular... Xilinx Vivado\|Xilinx ISE
6	TVPGTO705	A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc... Xilinx Vivado
7	TVPGTO719	Implementation of FPGA signed multiplier using different adders Xilinx Vivado
8	TVPGTO715	Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli... Xilinx Vivado
9	TVPGTO699	A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel... Xilinx Vivado
10	TVPGTO697	Design of DDS Signal Generator Based on FPGA Xilinx Vivado

Items per page:

1 – 10 of 70

Project Code: TVPGTO762

Project Title:Optimal Architecture of Floating-Point Arithmetic for Neural Network Training Processors

Xilinx Vivado

View Details

Project Code: TVPGTO777

Project Title:Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate

View Details

Project Code: TVPGTO753

Project Title:Analysis of High Speed Hybrid Full Adder

View Details

Project Code: TVPGTO760

Project Title:Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits

Xilinx Vivado

View Details

Project Code: TVPGTO747

Project Title:Design of Low-Power Wallace Tree Multiplier Architecture Using Modular Approach

Xilinx Vivado| Xilinx ISE

View Details

Project Code: TVPGTO705

Project Title:A New Image Encryption Algorithm Based on Single S-Box and Dynamic Encryption Step

Xilinx Vivado

View Details

Project Code: TVPGTO719

Project Title:Implementation of FPGA signed multiplier using different adders

Xilinx Vivado

View Details

Project Code: TVPGTO715

Project Title:Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications

Xilinx Vivado

View Details

Project Code: TVPGTO699

Project Title:A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wireless Sensor Networks

Xilinx Vivado

View Details

Project Code: TVPGTO697

Project Title:Design of DDS Signal Generator Based on FPGA

Xilinx Vivado

View Details

Items per page:

1 – 10 of 70

S.no	Project Code	Project Name
1	TVPGTO762	Optimal Architecture of Floating-Point Arithmetic for Neural Network T... Xilinx Vivado
2	TVPGTO777	Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate
3	TVPGTO753	Analysis of High Speed Hybrid Full Adder
4	TVPGTO760	Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits Xilinx Vivado
5	TVPGTO747	Design of Low-Power Wallace Tree Multiplier Architecture Using Modular... Xilinx Vivado\|Xilinx ISE
6	TVPGTO705	A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc... Xilinx Vivado
7	TVPGTO719	Implementation of FPGA signed multiplier using different adders Xilinx Vivado
8	TVPGTO715	Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli... Xilinx Vivado
9	TVPGTO699	A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel... Xilinx Vivado
10	TVPGTO697	Design of DDS Signal Generator Based on FPGA Xilinx Vivado

Items per page:

1 – 10 of 70

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