Project Code: TVPGTO762
Project Title:Optimal Architecture of Floating-Point Arithmetic for Neural Network Training ProcessorsView DetailsProject Code: TVPGTO777
Project Title:Power Efficient Clock Pulsed D Flip Flop Using Transmission GateView DetailsProject Code: TVPGTO760
Project Title:Data Flow Obfuscation: A New Paradigm for Obfuscating CircuitsView DetailsProject Code: TVPGTO747
Project Title:Design of Low-Power Wallace Tree Multiplier Architecture Using Modular ApproachView DetailsProject Code: TVPGTO705
Project Title:A New Image Encryption Algorithm Based on Single S-Box and Dynamic Encryption StepView DetailsProject Code: TVPGTO719
Project Title:Implementation of FPGA signed multiplier using different addersView DetailsProject Code: TVPGTO715
Project Title:Fixed-Posit: A Floating-Point Representation for Error-Resilient ApplicationsView DetailsProject Code: TVPGTO699
Project Title:A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wireless Sensor NetworksView Details S.no | Project Code | Project Name | Action |
---|---|---|---|
1 | TVPGTO762 | Optimal Architecture of Floating-Point Arithmetic for Neural Network T... | |
2 | TVPGTO777 | Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate | |
3 | TVPGTO753 | Analysis of High Speed Hybrid Full Adder | |
4 | TVPGTO760 | Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits | |
5 | TVPGTO747 | Design of Low-Power Wallace Tree Multiplier Architecture Using Modular... | |
6 | TVPGTO705 | A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc... | |
7 | TVPGTO719 | Implementation of FPGA signed multiplier using different adders | |
8 | TVPGTO715 | Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli... | |
9 | TVPGTO699 | A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel... | |
10 | TVPGTO697 | Design of DDS Signal Generator Based on FPGA |
Project Code: TVPGTO762
Project Title:Optimal Architecture of Floating-Point Arithmetic for Neural Network Training ProcessorsView DetailsProject Code: TVPGTO777
Project Title:Power Efficient Clock Pulsed D Flip Flop Using Transmission GateView DetailsProject Code: TVPGTO760
Project Title:Data Flow Obfuscation: A New Paradigm for Obfuscating CircuitsView DetailsProject Code: TVPGTO747
Project Title:Design of Low-Power Wallace Tree Multiplier Architecture Using Modular ApproachView DetailsProject Code: TVPGTO705
Project Title:A New Image Encryption Algorithm Based on Single S-Box and Dynamic Encryption StepView DetailsProject Code: TVPGTO719
Project Title:Implementation of FPGA signed multiplier using different addersView DetailsProject Code: TVPGTO715
Project Title:Fixed-Posit: A Floating-Point Representation for Error-Resilient ApplicationsView DetailsProject Code: TVPGTO699
Project Title:A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wireless Sensor NetworksView Details S.no | Project Code | Project Name | Action |
---|---|---|---|
1 | TVPGTO762 | Optimal Architecture of Floating-Point Arithmetic for Neural Network T... | |
2 | TVPGTO777 | Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate | |
3 | TVPGTO753 | Analysis of High Speed Hybrid Full Adder | |
4 | TVPGTO760 | Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits | |
5 | TVPGTO747 | Design of Low-Power Wallace Tree Multiplier Architecture Using Modular... | |
6 | TVPGTO705 | A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc... | |
7 | TVPGTO719 | Implementation of FPGA signed multiplier using different adders | |
8 | TVPGTO715 | Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli... | |
9 | TVPGTO699 | A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel... | |
10 | TVPGTO697 | Design of DDS Signal Generator Based on FPGA |
Project Code: TVPGTO762
Project Title:Optimal Architecture of Floating-Point Arithmetic for Neural Network Training ProcessorsView DetailsProject Code: TVPGTO777
Project Title:Power Efficient Clock Pulsed D Flip Flop Using Transmission GateView DetailsProject Code: TVPGTO760
Project Title:Data Flow Obfuscation: A New Paradigm for Obfuscating CircuitsView DetailsProject Code: TVPGTO747
Project Title:Design of Low-Power Wallace Tree Multiplier Architecture Using Modular ApproachView DetailsProject Code: TVPGTO705
Project Title:A New Image Encryption Algorithm Based on Single S-Box and Dynamic Encryption StepView DetailsProject Code: TVPGTO719
Project Title:Implementation of FPGA signed multiplier using different addersView DetailsProject Code: TVPGTO715
Project Title:Fixed-Posit: A Floating-Point Representation for Error-Resilient ApplicationsView DetailsProject Code: TVPGTO699
Project Title:A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wireless Sensor NetworksView Details S.no | Project Code | Project Name | Action |
---|---|---|---|
1 | TVPGTO762 | Optimal Architecture of Floating-Point Arithmetic for Neural Network T... | |
2 | TVPGTO777 | Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate | |
3 | TVPGTO753 | Analysis of High Speed Hybrid Full Adder | |
4 | TVPGTO760 | Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits | |
5 | TVPGTO747 | Design of Low-Power Wallace Tree Multiplier Architecture Using Modular... | |
6 | TVPGTO705 | A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc... | |
7 | TVPGTO719 | Implementation of FPGA signed multiplier using different adders | |
8 | TVPGTO715 | Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli... | |
9 | TVPGTO699 | A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel... | |
10 | TVPGTO697 | Design of DDS Signal Generator Based on FPGA |