Items per page:
1 – 10 of 144
S.no
Project Code
Project Name
Action
1 TVPGTO589 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Xilinx Vivado|Xilinx ISE

2 TVPGTO590 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx ISE

3 TVPGTO591 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx Vivado

4 TVPGTO592 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx ISE

5 TVPGTO593 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx Vivado

6 TVPGTO594 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx ISE

7 TVPGTO595 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx Vivado

8 TVPGTO596 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

DSP Core|Xilinx ISE

9 TVPGTO597 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

DSP Core|Xilinx Vivado

10 TVPGTO598 Design of Ultra-Low Power Consumption Approximate 4-2 Compressors Base...

Arithmetic Core|Xilinx ISE

Items per page:
1 – 10 of 144
Items per page:
1 – 10 of 144
S.no
Project Code
Project Name
Action
1 TVPGTO589 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Xilinx Vivado|Xilinx ISE

2 TVPGTO590 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx ISE

3 TVPGTO591 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx Vivado

4 TVPGTO592 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx ISE

5 TVPGTO593 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx Vivado

6 TVPGTO594 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx ISE

7 TVPGTO595 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx Vivado

8 TVPGTO596 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

DSP Core|Xilinx ISE

9 TVPGTO597 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

DSP Core|Xilinx Vivado

10 TVPGTO598 Design of Ultra-Low Power Consumption Approximate 4-2 Compressors Base...

Arithmetic Core|Xilinx ISE

Items per page:
1 – 10 of 144
Items per page:
1 – 10 of 144
S.no
Project Code
Project Name
Action
1 TVPGTO589 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Xilinx Vivado|Xilinx ISE

2 TVPGTO590 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx ISE

3 TVPGTO591 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx Vivado

4 TVPGTO592 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx ISE

5 TVPGTO593 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx Vivado

6 TVPGTO594 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx ISE

7 TVPGTO595 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx Vivado

8 TVPGTO596 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

DSP Core|Xilinx ISE

9 TVPGTO597 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

DSP Core|Xilinx Vivado

10 TVPGTO598 Design of Ultra-Low Power Consumption Approximate 4-2 Compressors Base...

Arithmetic Core|Xilinx ISE

Items per page:
1 – 10 of 144
Final year projects