S.no
Project Code
Project Name
Action
1 TVPGTO762 Optimal Architecture of Floating-Point Arithmetic for Neural Network T...

Xilinx Vivado

2 TVPGTO777 Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate
3 TVPGTO753 Analysis of High Speed Hybrid Full Adder
4 TVPGTO760 Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits

Xilinx Vivado

5 TVPGTO747 Design of Low-Power Wallace Tree Multiplier Architecture Using Modular...

Xilinx Vivado|Xilinx ISE

6 TVPGTO705 A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc...

Xilinx Vivado

7 TVPGTO719 Implementation of FPGA signed multiplier using different adders

Xilinx Vivado

8 TVPGTO715 Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli...

Xilinx Vivado

9 TVPGTO699 A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel...

Xilinx Vivado

10 TVPGTO697 Design of DDS Signal Generator Based on FPGA

Xilinx Vivado

Items per page:
1 – 10 of 70
S.no
Project Code
Project Name
Action
1 TVPGTO762 Optimal Architecture of Floating-Point Arithmetic for Neural Network T...

Xilinx Vivado

2 TVPGTO777 Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate
3 TVPGTO753 Analysis of High Speed Hybrid Full Adder
4 TVPGTO760 Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits

Xilinx Vivado

5 TVPGTO747 Design of Low-Power Wallace Tree Multiplier Architecture Using Modular...

Xilinx Vivado|Xilinx ISE

6 TVPGTO705 A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc...

Xilinx Vivado

7 TVPGTO719 Implementation of FPGA signed multiplier using different adders

Xilinx Vivado

8 TVPGTO715 Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli...

Xilinx Vivado

9 TVPGTO699 A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel...

Xilinx Vivado

10 TVPGTO697 Design of DDS Signal Generator Based on FPGA

Xilinx Vivado

Items per page:
1 – 10 of 70
S.no
Project Code
Project Name
Action
1 TVPGTO762 Optimal Architecture of Floating-Point Arithmetic for Neural Network T...

Xilinx Vivado

2 TVPGTO777 Power Efficient Clock Pulsed D Flip Flop Using Transmission Gate
3 TVPGTO753 Analysis of High Speed Hybrid Full Adder
4 TVPGTO760 Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits

Xilinx Vivado

5 TVPGTO747 Design of Low-Power Wallace Tree Multiplier Architecture Using Modular...

Xilinx Vivado|Xilinx ISE

6 TVPGTO705 A New Image Encryption Algorithm Based on Single S-Box and Dynamic Enc...

Xilinx Vivado

7 TVPGTO719 Implementation of FPGA signed multiplier using different adders

Xilinx Vivado

8 TVPGTO715 Fixed-Posit: A Floating-Point Representation for Error-Resilient Appli...

Xilinx Vivado

9 TVPGTO699 A Compact FPGA-Based Accelerator for Curve-Based Cryptography in Wirel...

Xilinx Vivado

10 TVPGTO697 Design of DDS Signal Generator Based on FPGA

Xilinx Vivado

Items per page:
1 – 10 of 70
Final year projects