SET Detection and Radiation Hardened Flip flop Using 180 nm Technology

Project Code :TVMABE302

Objective

To design and implement a radiation-hardened flip-flop using 180 nm CMOS technology that can detect and mitigate Single Event Transients (SETs) caused by radiation effects, with the following goals: ? Enhance the reliability of sequential logic circuits in radiation-prone environments (e.g., space, aerospace, and nuclear applications)

Abstract

In environments involving space and nuclear applications, significant radiation is present, which rarely causes soft errors in electronic circuits. The current trends in the VLSI industry emphasize reducing transistor sizes and increasing the number of transistors on a chip within the same area. As transistors scale, their threshold voltage decreases. When radiation causes a particle to strike a sensitive node in a digital circuit, it can result in charge accumulation at that node. This small additional voltage or charge may occasionally alter the state of the digital circuitry, leading to a soft error. DEP is used to simulate the charge introduced at a sensitive node, replicating the impact of radiation. D flip flop is implemented using a 180 nm technology node in Cadence Virtuoso.

Keywords— Pipeline; Soft Errors; Single Event Transients (SET)

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Specifications

Software Requirements:

· Tool: Cadence virtuoso

· Technology files: GPDK 180nm

Hardware Requirements:

· Microsoft® Windows XP

· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

· 512 MB RAM

· 100 MB of available disk space

Learning Outcomes

Introduction to Digital electronics
Importance of Transistors

MOS Fundamentals
NMOS/PMOS/CMOS Technologies
How to design circuits using Transistor logic?
Scope of FLIP FLOPS in today’s world
Use of feedback signals.
Applications in Real time.
Active elements importance.

Solution providing for real time problems

Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation skills
Thesis Writing Skills

Demo Video

https://youtu.be/ueF4Sgp1WXE?si=tCpWrAQTCUZv91eY

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TVMABE226 Low Power Redundant Transition Free TSPC Dual Edge Triggering Flip Flop Using Single Transistor Clocked Buffer View Details

Front End Domains

Arithmetic Core
Communications
DSP Core
FPGA

Back End Domains

Core Memories
Low Power VLSI
Transistor Logic
Nano Technology

Tools

Xilinx ISE
FPGA
Cadence EDA
Xilinx Vivado

Others

Matlab Interfacing