Security Enhancement of Information using Multilayered Cryptographic Algorithm

Also Available Domains Communications and Crypto Core|Xilinx ISE

Project Code :TVPGTO403

Objective

The main objective of this paper is to reduce the problem of data hacking by using the multilayer linear feedback shift register (LFSR) cryptographic technique. The cascaded multilayer cryptography is analyzed for improved data security and reducing power consumption

Abstract

To enhance the data security level, the multi-layer technique is presented in this project. The single-layered LFSR cryptography is analyzed with a cascaded LFSR cryptography technique to prove the security of digitized data.

The authentication key generation circuits for various levels of bit handling in data communication systems are implemented in LFSR cascaded cryptography in both encryption and decryption process. By using this process, the area and power consumption will be reduced. The effectiveness of the proposed method is synthesized and simulated using Xilinx Vivado.

Keywords: Linear Feedback Shift Register (LFSR), OTP Algorithm, Single-cascaded Cryptography, Encryption, Decryption

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

Xilinx Vivado
HDL: Verilog

Hardware Requirements:

Microsoft® Windows XP
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Basics of Digital Electronics
FPGA design Flow
Introduction to Verilog Coding
Different modeling styles in Verilog

Data Flow modeling
Structural modeling
Behavioral modeling
Mixed level modeling

Combinational & Sequential circuits
Testing concepts
Stuck-at-zero & stuck-at-one faults
Knowledge on Pseudo-random patterns
Linear Feedback Shift Register
Different Cryptography methods
LFSR OTP algorithms

Encryption
Decryption

Applications in real time
Xilinx Vivado for design and simulation
Generation of Netlist
Solution providing for real time problems
Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation Skills
Thesis Writing Skills

Demo Video

Front End Domains

DSP Core
Communications and Crypto Core
Design for Testability
Arithmetic Core
Nano Technology

Back End Domains

Nano Technology
Core Memories
Transistor Logic
Low Power VLSI

Tools

Cadence EDA
Xilinx Vivado
Xilinx ISE
Tanner EDA
FPGA

Others

Matlab Interfacing