Power Efficient Tiny Yolo CNN using Reduced Hardware Resources Based on Booth Multiplier and WALLACE Tree Adders
Also Available Domains Cadence EDA|Xilinx Vivado|Xilinx ISE
Objective
The objective of this project is to reduce the resources on FPGA consumed by CNN accelerators and improve the system performance in terms of power. For reducing the power, a new processing element based on MBE multiplier to replace MAC units and WALLACE tree adders as an alternate solution for deep binary adder trees is proposed
Abstract
The term Deep Learning or Deep Neural Network refers to Artificial Neural Networks (ANN) with multi layers. Over the last few decades, it has been considered to be one of the most powerful tools, and has become very popular in the literature as it is able to handle a huge amount of data. In CNN, processing elements plays a vital role for the accelerator design. To reduce the amount of hardware resources and power consumption, this project provides a new processing element design as an alternate solution for hardware implementation.
Modified Booth Encoding (MBE) multiplier and WALLACE tree-based adders are proposed to replace bulk MAC units and typical adder tree respectively. The synthesis and simulation are verified by using Xilinx ISE 14.7 version tool.
Keywords: Convolutional Neural Network, Booth Encoding Multiplier, WALLACE Tree Adders, Processing Elements
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
- Xilinx ISE 14.7/Xilinx Vivado
- HDL: Verilog
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
- Basics of Digital Electronics
- FPGA design Flow
- Introduction to Verilog Coding
- Different modeling styles in Verilog
- Data Flow modeling
- Structural modeling
- Behavioral modeling
- Mixed level modeling
- Combinational & Sequential circuits
- About Arithmetic circuits
- Knowledge on Multipliers
- Wallace tree multiplier
- Booth Multiplier
- Knowledge on different adder structures
- About Processing Element Units
- About Convolution Neural Network
- Knowledge on different layers in CNN
- About On-Chip memory Organization
- Applications in real time
- Xilinx ISE 14.7/Xilinx Vivado for design and simulation
- Generation of Netlist
- Solution providing for real time problems
- Project Development Skills:
- Problem Analysis Skills
- Problem Solving Skills
- Logical Skills
- Designing Skills
- Testing Skills
- Debugging Skills
- Presentation Skills
- Thesis Writing Skills
Paper Publishing
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