Optimized High Speed Radix-8 FFT algorithm implementation on FPGA
Also Available Domains Xilinx Vivado
Abstract
In this project, a novel concept for a binary-to-gray code and a BCD-to-Excess 3 code converter based on QCA are proposed. QCA technology is considered to be a possible alternative for circuit implementation in terms of energy efficiency, integration density and switching frequency which can replace CMOS implementations as nm technology decreases. In comparison to complementary metal–oxide semiconductor (CMOS) technology, QCA is a remarkable and challenging alternative with many attractive aspects such as fast execution and low power use. To accomplish all arithmetic processes, code converters are the fundamental unit of information change.. The promised structure diminishes the number of cells, area utilized to make the design cost effective. These designs and implemented and simulated using QCA Designer tool.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
- Xilinx ISE Tool
- HDL: Verilog
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
- Basics of Digital Electronics
- VLSI design Flow
- Introduction to Verilog Coding
- Different modeling styles in Verilog
- Data Flow modeling
- Structural modeling
- Behavioral modeling
- Mixed level modeling
- Introduction to Fourier transform
- Knowledge on Fourier series
- Different types of signals
- Knowledge on Radix-r butterfly units
- Knowledge on DFT, FFT
- Applications in real time
- Xilinx ISE 14.7/Xilinx Vivado for design and simulation
- Generation of Netlist
- Solution providing for real time problems
- Project Development Skills:
- Problem Analysis Skills
- Problem Solving Skills
- Logical Skills
- Designing Skills
- Testing Skills
- Debugging Skills
- Presentation Skills
- Thesis Writing Skills
Paper Publishing
Request Call Back
Would you like to receive a free callback now?
Choose the best time for callback:
Leave your message and we will contact you as soon as possible
6-2-85/B, Old Maternity Hospital Road, Thyagaraja Nagar, Tirupati, Andhra Pradesh – 517501
+91 9030333433
+91 9393939065
0877-2261612
Disclaimer - Takeoff Edu Group Projects are not associated or affiliated with IEEE in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, not projects of or by IEEE.
