Sequential devices are the fundamental building blocks for almost all digital electronic systems with memory. Due to the importance of instant data recovery after unexpected data loss such as unplanned power down, sequential devices need to have the nonvolatile property, which motivates the recent research and practice in integrating the nonvolatile memristors into CMOS devices. In this paper, we study how to apply this approach to improve the quality of nonvolatile D latch. Unlike the structure of conventional design, the proposed D latch consists of only one memristors, several transmission gates, and CMOS inverters. Our design overcomes the negative effect due to the threshold loss of the transistors. As simulation shows, compared with the current designs, our proposed memristors based D latch can support the memristors to switch between different resistance states much faster, and thus achieving a clock of higher frequency. In addition, our design allows the threshold value of the memristors to be selected from a much wider range.

Keywords:D latch,memristors,master-slave D flip-flop, nonvolatile