Low-Power Programmable PRPG with Test Compression Capabilities

Also Available Domains Testing|Xilinx ISE

Project Code :TVMATO251

Abstract

This paper describes a low-power (LP) programmable generator capable of producing pseudorandom test patterns with desired toggling levels and enhanced fault coverage gradient compared with the best-to-date built-in self-test (BIST)- based pseudorandom test pattern generators. It is comprised of a linear finite state machine (a linear feedback shift register or
a ring generator) driving an appropriate phase shifter, and it comes with a number of features allowing this device to produce binary sequences with preselected toggling (PRESTO) activity.
We introduce a method to automatically select several controls of the generator offering easy and precise tuning. The same technique is subsequently employed to deterministically guide the
generator toward test sequences with improved fault-coverage-to pattern-count ratios. Furthermore, this paper proposes an LP test compression method that allows shaping the test power envelope in a fully predictable, accurate, and flexible fashion by adapting
the PRESTO-based logic BIST (LBIST) infrastructure. The proposed hybrid scheme efficiently combines test compression with LBIST, where both techniques can work synergistically
to deliver high quality tests. Experimental results obtained for industrial designs illustrate the feasibility of the proposed test schemes and are reported herein.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Specifications

Hardware requirement

             Processor               -    Pentium –III

 

Speed                                -    1.1 GHz

RAM                                 -    1 GB (min)

Hard Disk                          -   40 GB

Floppy Drive                     -    1.44 MB

Key Board                         -    Standard Windows Keyboard

Mouse                                -    Two or Three Button Mouse

Monitor                              -    SVGA

 

Software requirements

Operating System            :Windows95/98/2000/XP/Windows7

 

Front End                          :   Modelsim 6.3 for Debugging and Xilinx 14.3 for                     Synthesis and Hard Ware Implementation

 

This software’s where Verilog source code can be used for design implementation.

 

Learning Outcomes

  • Basics of Digital Electronics
  • VLSI design Flow
  • Introduction to LBIST
  • Writing Verilog code.
  • Introduction to BIST.
  • Knowledge on Low power programmable.
  • Applications in real time

·         Xilinx tool for writing code, synthesis and simulation

·         Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation Skills

o   Thesis Writing Skills

 

 

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