Also Available Domains Low Power VLSI
In this paper, two proposed circuits of PMOS-biased sense amplifier is implemented. A fast access time and low power dissipation are achieved with newly developed circuits of sense amplifier for low voltage supply.
In this paper, PMOS biased sense amplifier is proposed. Sense amplifiers plays a significant role in terms of its recital, functionality and reliability of the memory circuits. The proposed circuit is PMOS biased sense amplifier, which provides very high output impedance and has reduced sense delay and power dissipation and it performs the identical operations as that of conventional circuits. The suggested sense amplifiers overall performance have been simulated and examined using Cadence Virtuoso employing 180 nm library parameters.
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