This study presents a hardware-friendly interference mitigation technique with FSD for improved DL MU-MIMO systems, achieving significant performance enhancements.
In this work, a fixed-complexity sphere decoder (FSD) and an interference mitigation technique are presented for downlink (DL) multiuser (MU) multiple-input multiple-output (MIMO) systems. To lessen the impact of inter-user interference on performance in DL MU-MIMO systems, an optimized interference mitigation technique that is hardware-friendly is offered. The proposed approach performs 0.5 dB near-optimally for the soft-output choice, which is 4 dB better than the existing interference whitening filter. In this study, the proposed interference mitigation technique is applied to both hard and soft-output FSD detectors to provide 8X8 antenna MIMO detection and interference mitigation for 4 additional streams. And also Block Diagonalization (BD) technique for minimizing the interference and ber to an even deeper levels. A fully pipelined architecture supports 3.6 Gbps @ 150 MHz for signals modulated by 64-QAM. The synthesis result shows that the intended symbol detector has a gate count of 887 K for the FSD without a pre-processor and a gate count of 1220 K for interference mitigation. When compared to previously deployed MIMO detectors, the proposed architecture for DL MU-MIMO systems shows promise in terms of a significant improvement in performance with respect to inter-user interference.
Keywords: Fixed-Complexity Sphere Decoder (FSD), Block Diagonalization (BD), MIMO Detection, 8X8 Antenna MU-MIMO, Multiuser Multi-Input Multi-Output (MU-MIMO).
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