High-Speed Grouping and Decomposition Multiplier for Binary Multiplication

Also Available Domains Xilinx Vivado|Xilinx ISE

Project Code :TVPGTO930

Objective

The paper presents a novel approach to binary multiplication by introducing a high-speed grouping and decomposition multiplier.

Abstract

Abstract: The paper presents a novel approach to binary multiplication by introducing a high-speed grouping and decomposition multiplier. The proposed multiplier uses a combination of Wallace tree and Dadda multiplier, and a novel grouping and decomposition technique to reduce the number of partial products and critical path delay. The full adder designed in this is based on GDI Logic. The proposed design is implemented using a 180nm CMOS technology and evaluated against state-of-the-art binary multipliers. The results show that the proposed multiplier outperforms existing designs in terms of speed, power consumption, and area. The design is particularly suitable for use in high-speed digital signal processing applications such as audio and video processing.

Keywords: digital signal processing; fast Fourier transform; grouping and decomposition multiplier; 5:2 logic adder

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Specifications:

Software Requirements:

· Tool: Tanner EDA

· Technology: 180nm

Hardware Requirements:

Microsoft® Windows XP
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Learning Outcomes:

· Introduction to Digital Electronics

o Basics of Combinational Circuits

o Applications of Combinational Circuits

· Different types of Multipliers

· Knowledge on Wallace tree multiplier

· Knowledge on Dadda multiplier

· Introduction to Analog Electronics

· Introduction to Transistor & MOSFETs

· Transistor level schematic of Multiplier in Tanner EDA

· Simulation of schematic in T-spice.

· Analysis of results and waveforms.

· Scope of Grouping and decomposing structure in today’s world.

Demo Video

Request Video

Front End Domains

DSP Core
Communications and Crypto Core
Design for Testability
Arithmetic Core
Nano Technology

Back End Domains

Nano Technology
Core Memories
Transistor Logic
Low Power VLSI

Tools

Cadence EDA
Xilinx Vivado
Xilinx ISE
Tanner EDA
FPGA

Others

Matlab Interfacing