Glitch-Optimized Circuit Blocks for Low-Power High-Performance Booth Multipliers
Also Available Domains Low Power VLSI|Cadence EDA
Objective
The main objective of this work is to propose the glitch-optimized circuit is to reduce dynamic power dissipation caused by the parasitics and spurious activities in Booth multipliers.
Abstract
In this project, a novel 8 bit Booth Multiplier is designed. Multipliers are essential components of digital hardware, ranging from deeply embedded System on-Chip (SoC) cores to GPU-based accelerators. The proposed Booth Multiplier follows proper sizing algorithm to avoid glitches and improve the performance in terms of delay and power when compared to existing multiplier. The proposed multiplier is simulated using 45nm CMOS technology. The proposed multiplier is simulated using 45nm CMOS technology in Tanner EDA tool.
Keywords: Booth Multipliers, CMOS, glitch reduction, System on-Chip (SoC).
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
- Tanner EDA
- Technology files:45nm
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
- Introduction to Multipliers
- Transistors & its applications
- Types of Transistors
- Logic Gates using Transistors
- Pull Up and Pull Down networks
- Importance of Transistors
- MOS Fundamentals
- NMOS/PMOS/CMOS Technologies
- How to design circuits using Transistor logic?
- Low power techniques
- Concepts of sizing
- Transistor level design for multipliers
- How to design low power, high speed area efficient transistor level circuits?
- Scope of glitch optimized Multipliers in today’s world
- Applications in real time
- Tanner EDA tool for design and simulation
- Solution providing for real time problems
- Project Development Skills:
- Problem Analysis Skills
- Problem Solving Skills
- Logical Skills
- Designing Skills
- Testing Skills
- Debugging Skills
- Presentation Skills
- Thesis Writing Skills
Paper Publishing
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