Fully Reused VLSI Architecture of Fm0manchester Encoding using SOLS Technique for DSRC Applications

Also Available Domains Communications and Crypto Core|Xilinx Vivado

Project Code :TVPGTO265

Objective

In this paper, the similarity-oriented logic simplification (SOLS) technique is proposed to overcome this limitation.

Abstract

The dedicated short-range communication (DSRC) is an emerging technique to push the intelligent transportation system into our daily life. The DSRC standards generally adopt FM0 and Manchester codes to reach dc-balance, enhancing the signal reliability. Nevertheless, the coding-diversity between the FM0 and Manchester codes seriously limits the potential to design a fully reused VLSI architecture for both. In this paper, the similarity-oriented logic simplification (SOLS) technique is proposed to overcome this limitation. The SOLS technique improves the hardware utilization rate from 57.14% to 100% for both FM0 and Manchester encodings. The performance of this paper is evaluated on the post layout simulation in Taiwan Semiconductor Manufacturing Company (TSMC) 0.18-µm 1P6M CMOS technology. The maximum operation frequency is 2 GHz and 900 MHz for Manchester and FM0 encodings, respectively. The power consumption is 1.58 mW at 2 GHz for Manchester encoding and 1.14 mW at 900 MHz for FM0 encoding. The core circuit area is 65.98 × 30.43 µm2. The encoding capability of this paper can fully support the DSRC standards of America, Europe, and Japan. This paper not only develops a fully reused VLSI architecture, but also exhibits an efficient performance compared with the existing works.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Specifications

Hardware requirement

             Processor               -    Pentium –III

 

Speed                                -    1.1 GHz

RAM                                 -    1 GB (min)

Hard Disk                          -   40 GB

Floppy Drive                     -    1.44 MB

Key Board                         -    Standard Windows Keyboard

Mouse                                -    Two or Three Button Mouse

Monitor                              -    SVGA

Software requirements

Operating System :Windows95/98/2000/XP/Windows7

 

Front End :   Modelsim 6.3 for Debugging and Xilinx 14.3 for Synthesis and Hardware Implementation

 

This software’s where Verilog source code can be used for design implementation.

 

Learning Outcomes

  • Basics of Digital Electronics
  • VLSI design Flow
  • Introduction VLSI  architecture
  • Writing Verilog code.
  • Introduction to FM0/Manchester Encoding
  • Knowledge on sols technique for DSRC applications
  • Applications in real time

·         Xilinx tool for writing code, synthesis and simulation

·         Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation Skills

o   Thesis Writing Skills

 

 

 

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