FPGA implementation of high performance digital FIR filter design using a hybrid adder and multiplier
Objective
In this technique, the basic hybrid adder is designed with the help of 2-bit adders, BEC and 4:1 Multiplexer for high performance.
Abstract
The energetic growth in portable multimedia and mobile communication system has increased the requirement of high speed signal processing system with compact area and power consumption. Finite impulse response(FIR) filters are broadly used in image, signal, speech and video signal processing, medical electronics, noise filtering, mobile communication and many other fields. The performance of the whole signal processing system with FIR filter depends on the basic building block of multiplier and adders. Hence, the hybrid FIR filter is proposed to improve the speed of the signal processing system using hybrid adder and hybrid multiplier. In this technique, the basic hybrid adder is designed with the help of 2-bit adders, BEC and 4:1 Multiplexer. Also, the hybrid multiplier is designed based on partial products of two consecutive multiplicand bits which are added at same time using HanCarlson, Weinberger and Ling adder. The proposed FIR filter is functionally verified and synthesised using Xilinx ISE VIVADO
Keywords: Hybrid adder; hybrid multiplier; FIR filter; FPGA; VLSI; Xilinx VIVADO
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
· Xilinx ISE Vivado
· HDL: Verilog
Minimum Hardware Requirements:
· Microsoft® Windows 7
· Intel® i3 or equivalent
· 4 GB RAM
· 100 MB of available disk space
Learning Outcomes
- Basics of Digital Electronics
- VLSI design Flow
- Introduction to Verilog Coding
- Different modeling styles in Verilog
o Data Flow modeling
o Structural modeling
o Behavioral modeling
o Mixed level modeling
- Introduction to Arithmetic circuits
- Knowledge on types of approximate adder circuits
- Different approximation techniques
- Knowledge on approximate FA adder designs
- Applications in real time
· Xilinx ISE 14.7/Xilinx Vivado for design and simulation
· Generation of Netlist
· Solution providing for real time problems
· Project Development Skills:
o Problem Analysis Skills
o Problem Solving Skills
o Logical Skills
o Designing Skills
o Testing Skills
o Debugging Skills
o Presentation Skills
o Thesis Writing Skills
Paper Publishing
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