Floating Point Multipliers on FPGAs

Project Code :TVMAFE794

Objective

Abstract

This work presents IEEE 754 compliant floatingpoint multipliers for various formats: Half Precision (HP), Single Precision (SP), Double Precision (DP), Double Extended Precision (DEP), and Quadruple Precision (QP), with bit lengths of 16, 32, 64, 80, and 128 bits, respectively, implemented on Field Programmable Gate Arrays (FPGAs). The study explores different mantissa multipliers – Optimized Schoolbook Multiplier (OBSM), Hybrid Karatsuba Multiplier (HKM) and Hybrid Recursive Karatsuba Multiplier (HRKM) – to identify the most efficient mantissa multipliers that comply with the IEEE 754 standard and are suitable for floating-point multipliers. Hardware implementations show that the proposed HRKM-based SP and DP floating-point multipliers show a better Area-Time-Product (ATP) performance of 79. 599% and 83. 901%, respectively, in comparison to the latest state-of-the-art work on the AMD Kintex Ultrascale KCU105 FPGA platform

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

· VIVADO 2018.3

Hardware Requirements:

· Microsoft® Windows XP

· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

· 512 MB RAM

· 100 MB of available disk space

Learning Outcomes

Understanding of IEEE-754 floating-point formats across multiple precisions
Knowledge of advanced multiplication algorithms (OBSM, HKM, HRKM)
Insight into Area-Time Product (ATP) optimization techniques
Experience in FPGA-based hardware design and implementation
Ability to compare and analyze different multiplier architectures
Understanding scalability challenges in high-precision arithmetic design

Exposure to performance evaluation metrics in digital system design

Demo Video

Request Video

Front End Domains

Cadence EDA
Finite State Machines
Arithmetic Core
DSP Core
Communications
Nano Technology
Testing

Back End Domains

Nano Technology
Cadence EDA
Low Power VLSI
Core Memories
Transistor Logic

Tools

FPGA
H-Spice
Cadence EDA
QCA
Xilinx Vivado
Xilinx ISE
Tanner EDA
LT-Spice

Others

Matlab Interfacing

H-Spice

LT-Spice