Exploring the Usage of Fast Carry Chains to Implement Multistage Ring Oscillators on FPGAs: Design and Characterization

- The project Ring oscillators (ROs) are essential in many applications, demanding high reliability, flexibility, and minimal area and energy consumption. With the rise of Internet-of-Things (IoT) technology, the efficient implementation of ROs on field-programmable gate arrays (FPGAs) has become critical, particularly for secure and resource-efficient designs. This study introduces a novel RO design strategy utilizing FPGA carry chains (CCs), significantly reducing slice usage and energy consumption by up to 50% and 44%, respectively, compared to conventional lookup table (LUT)-based designs. Implemented on an Artix-7 FPGA, the 33-stage RO achieves multiphase outputs oscillating at 29.7 MHz with a standard deviation below 10 kHz. The design also demonstrates high flexibility, allowing customization for specific applications, such as achieving a sensitivity of 49 kHz/°C—over four times higher than LUT-based counterparts—making it ideal for thermal monitoring. This approach showcases the potential of CC-based ROs for efficient and scalable FPGA implementations.

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Keywords— Carry chains (CCs), digital circuits, field programmable gate array (FPGA), ring oscillators (ROs), temperature/voltage sensitivity analysis