ER-TCAM: A Soft-Error-Resilient SRAM-Based Ternary Content-Addressable Memory for FPGAs

Also Available Domains Communications|FPGA|Xilinx Vivado

Project Code :TVMATO493

Objective

The main theme of this work is to protect the memories against soft errors by reducing the minimal path delay. This technique uses a single-bit parity for fault detection & the binary-encoded TCAM table maintained in SRAM-based TCAMs for update purposes.

Abstract

In this project, a low-cost, low-response time and easy for integration technique for the protection of SRAM-enabled TCAMs without compromising the search performance is presented. The error detection is carried out in a simple way using single-bit parity checking at a minimal delay and logic overhead. The proposed error-correction technique exploits the redundant binary-encoded TCAM table maintained in SRAM-based TCAM solutions for update purposes to correct soft errors. 

It maintains a high search performance while the proposed error correction mechanism is carried out in the background, allowing search operations to be performed simultaneously.

 The proposed error-correction technique has a low response time, ensuring a faultless TCAM design for lookups, during the entire processing time. This design is synthesized and simulated using Xilinx ISE 14.7

Keywords: Field Programmable Gate Array (FPGA), soft errors, Static Random Access Memory (SRAM), Ternary Content Addressable Memory (TCAM)

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

  • Xilinx ISE 14.7
  • HDL: Verilog

Hardware Requirements:

  • Microsoft® Windows XP
  • Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support 
  • 512 MB RAM
  • 100 MB of available disk space

Learning Outcomes

  • Basics of Digital Electronics
  • FPGA design Flow
  • Introduction to Verilog Coding
  • Different modeling styles in Verilog
    • Data Flow modeling
    • Structural modeling
    • Behavioral modeling
    • Mixed level modeling
  • Introduction to memories
    • SRAM
    • BRAM
    • LUTRAM
  • Knowledge on Ternary Content Addressable Memory
  • About Error Correction Code
  •  Data storing process
  • About Software Defined Networking
  • Applications in real time
  • Xilinx ISE 14.7 for design and simulation
  • Generation of Netlist
  • Solution providing for real time problems
  • Project Development Skills:
    • Problem Analysis Skills
    • Problem Solving Skills
    • Logical Skills
    • Designing Skills
    • Testing Skills
    • Debugging Skills
    • Presentation Skills
    • Thesis Writing Skills

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