Energy Efficient Single-ended 6T SRAM for Multimedia Applications

Multimedia applications require large embedded storage. Approximate memory has been shown as a potential energy efficient solution for such error-tolerant applications in previous papers. In this paper, A single ended 6-T (SE6T) SRAM cell which reduces dynamic power up  compared to conventional 6-T SRAM cell with the same bit error rate (BER) is proposed. Ultra low voltage power-efficient embedded memories with BER can be used for storage because  image processing applications are inherently tolerant to errors to some extent, We show proposed SE6T memory consumes less dynamic power, leakage power and takes less area as compared to conventional 6T SRAM memory for similar peak signal to noise ratio (PSNR). Heterogeneous SE6T 1K SRAM memory is proposed and proved that for a given power budget, PSNR enhances compared to when homogeneous (identically sized bit-cells) SE6T SRAM memory are used. When compared with heterogeneous 6T SRAM memory, the heterogeneous SE6T SRAM memory consumes less dynamic power,  leakage power and takes less area for almost similar PSNR. For a given PSNR, the SE6T memory is cumulatively better in terms of design complexity, area and power when compared with other hybrid and heterogeneous approximate memories.