Energy Efficient Compact Approximate Multiplier for Error-Resilient Applications
Objective
The main objective appears to be designing an energy-efficient, compact approximate multiplier suitable for error-resilient applications
Abstract
Abstract:
This paper introduces innovative methods to improve system performance via approximate computing, focusing on energy efficiency, speed, and compact design. It presents two novel compressor architectures: an 8-transistor and a 14-transistor 4:2 compressor, both leveraging CMOS technology with unique approximation techniques. These designs significantly reduce negative errors and eliminate the need for expensive error recovery modules, enhancing overall performance. The 14-transistor version offers a trade-off between accuracy and area, balancing compactness with precision. Additionally, the authors evaluate a compressor-tailored circuit architecture through image multiplication, demonstrating substantial area savings and reduced power-delay product. Overall, their approximate multiplier outperforms traditional exact multipliers in terms of accuracy and efficiency.
Key words:
Approximate computing, Compressor, Multiplier, Image Multiplication.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
· Xilinx Vivado Tool
· HDL: Verilog
Hardware Requirements:
· Microsoft® Windows XP
· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
· 512 MB RAM
· 100 MB of available disk space
Learning Outcomes
- Basics of Digital Electronics
- VLSI design Flow
- Introduction to Verilog Coding
- Different modelling styles in Verilog
o Data Flow modelling
o Structural modelling
o Behavioural modelling
o Mixed level modelling
- Introduction to multiplier design
- About Wallace multiplication
- Knowledge on partial product generation and reduction
- Knowledge on adders, compressors
- About approximation computing
- Applications in real time
· Xilinx ISE 14.7/Xilinx Vivado for design and simulation
· Generation of Netlist
· Solution providing for real time problems
· Project Development Skills:
o Problem Analysis Skills
o Problem Solving Skills
o Logical Skills
o Designing Skills
o Testing Skills
o Debugging Skills
o Presentation Skills
o Thesis Writing Skills
Demo Video
Request for Video
Paper PublishingRequest Call Back
Would you like to receive a free callback now?
Choose the best time for callback:
Leave your message and we will contact you as soon as possible
6-2-85/B, Old Maternity Hospital Road, Thyagaraja Nagar, Tirupati, Andhra Pradesh – 517501
+91 9030333433
+91 9393939065
0877-2261612
Disclaimer - Takeoff Edu Group Projects are not associated or affiliated with IEEE in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, not projects of or by IEEE.
