By creating an energy-efficient, compact approximate multiplier with error resilience, this work aims to contribute to the development of more sustainable and adaptable digital systems. This design could enable the widespread adoption of edge computing and IoT devices in various applications where precise arithmetic is not always necessary but energy efficiency is paramount.
Abstract:
This paper introduces innovative methods to improve system performance via approximate computing, focusing on energy efficiency, speed, and compact design. It presents two novel compressor architectures: an 8-transistor and a 14-transistor 4:2 compressor, both leveraging CMOS technology with unique approximation techniques. These designs significantly reduce negative errors and eliminate the need for expensive error recovery modules, enhancing overall performance. The 14-transistor version offers a trade-off between accuracy and area, balancing compactness with precision. Additionally, the authors evaluate a compressor-tailored circuit architecture through image multiplication, demonstrating substantial area savings and reduced power-delay product. Overall, their approximate multiplier outperforms traditional exact multipliers in terms of accuracy and efficiency.
Key words:
Approximate computing, Compressor, Multiplier, Image Multiplication.
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Software Requirements:
· Xilinx Vivado Tool
· HDL: Verilog
Hardware Requirements:
· Microsoft® Windows XP
· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
· 512 MB RAM
· 100 MB of available disk space
o Data Flow modelling
o Structural modelling
o Behavioural modelling
o Mixed level modelling
· Xilinx ISE 14.7/Xilinx Vivado for design and simulation
· Generation of Netlist
· Solution providing for real time problems
· Project Development Skills:
o Problem Analysis Skills
o Problem Solving Skills
o Logical Skills
o Designing Skills
o Testing Skills
o Debugging Skills
o Presentation Skills
o Thesis Writing Skills