Energy Efficient Code Converters using Reversible Logic Gates

Also Available Domains Arithmetic Core|Xilinx Vivado

Project Code :TVMATO284

Objective

This paper proposes novel Reversible logic design for code conversion such as Binary to Gray code, Gray to Binary code, BCD to Excess 3 code, Excess 3 to BCD code.

Abstract

Abstract:

In this technological world development in the field of nanometer technology leads to minimize the power consumption of logic circuits. Reversible logic design has been one of the promising technologies gaining greater interest due to less dissipation of heat and low power consumption. In digital systems code conversion is a widely used process for reasons such as enhancing security of data, reducing the complexity of arithmetic operations and thereby reducing the hardware required, dropping the level of switching activity leading to more speed of operation and power saving etc. This paper proposes novel Reversible logic design for code conversion such as Binary to Gray code, Gray to Binary code, BCD to Excess 3 code, Excess 3 to BCD code.

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Block Diagram

Specifications

Software Requirements:

·         Tool:Xilinx vivado/ISE

·         Technology: 90nm.

Hardware Requirements:

  • Microsoft® Windows XP
  • Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
  • 512 MB RAM
  • 100 MB of available disk space

Learning Outcomes

·         Understanding of low power design principles

·         Knowledge of Logic Gates

·         Familiarity with code converters

·         Knowledge on Xilinx ISE/vivado

·         Power optimization techniques

·         Communication and presentation skills

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