Also Available Domains Transistor Logic|Cadence EDA|Tanner EDA
This paper presents an effective logical approach low power full adder, which reduces power consumption by implementing full adder using EXOR-EXNOR circuit.
This paper presents an effective logical approach low power full adder, which reduces power consumption by implementing full adder using EXOR-EXNOR circuit. The advanced new hybrid FA modules are more efficient in terms of the energy and postponement, these are because of the low yield capability and low power consumption. These proposed circuits are planned dependent on the full-swing EXORβEXNOR or EXOR/EXNOR gates. Every one of the new designs has their very own preferences regarding speed, energy consumption, delay product, capacity of driving, and soon. To examine the execution of the new structures, broad Tanner simulation tools are utilized. By utilizing the transistor measuring (W/L) technique, the optimization of the PDP gained for every hybrid adder circuit.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

