Design of Low-Power Non-binary LDPC Decoder Exploiting DRAM Refresh Rate Over-scaling

This brief presents a low-power non-binary LDPC decoder design exploiting domain specific information for high throughput wireless video communication applications. The proposed technique can dynamically scale the refresh rate of DRAM according to channel conditions as well as decoding states, hence to greatly reduce the DRAM power as well as the decoder power with lower refresh overhead. Evaluation results show that the proposed technique can achieve significant decoder power saving than conventional techniques.