Design of Low power and High Speed Carry Select Adder using Brent Kung Adder

Also Available Domains Arithmetic Core|Xilinx ISE

Project Code :TVMATO285

Objective

In this paper, Carry Select Adder (CSA) architectures are proposed using parallel prefix adders. Instead of using dual Ripple Carry Adders (RCA), parallel prefix adder i.e., Brent Kung (BK) adder is used to design Regular Linear CSA.

Abstract

In this paper, Carry Select Adder (CSA) architectures are proposed using parallel prefix adders. Instead of using dual Ripple Carry Adders (RCA), parallel prefix adder i.e., Brent Kung (BK) adder is used to design Regular Linear CSA. Adders are the basic building blocks in digital integrated circuit based designs. Ripple Carry Adder (RCA) gives the most compact design but takes longer computation time. The time critical applications use Carry Look-ahead scheme (CLA) to derive fast results but they lead to increase in area. Carry Select Adder is a compromise between RCA and CLA in term of area and delay. Delay of RCA is large therefore we have replaced it with parallel prefix adder which gives fast results. In this paper, structures of 16-Bit Regular Linear Brent Kung CSA, Modified Linear BK CSA, Regular Square Root (SQRT) BK CSA and Modified SQRT BK CSA are designed. Power and delay of all these adder architectures are calculated at different input voltages. The results depict that Modified SQRT BK CSA is better than all the other adder architectures in terms of power but with small speed penalty. The designs have been synthesized at 45nm technology using Tanner EDA tool.

 

 

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Specifications

Hardware requirement

             Processor               -    Pentium –III

 

Speed                                -    1.1 GHz

RAM                                 -    1 GB (min)

Hard Disk                          -   40 GB

Floppy Drive                     -    1.44 MB

Key Board                         -    Standard Windows Keyboard

Mouse                                -    Two or Three Button Mouse

Monitor                              -    SVGA

 

Software requirements

Operating System            :Windows95/98/2000/XP/Windows7

 

Front End                          :   Modelsim 6.3 for Debugging and Xilinx 14.3 for                     Synthesis and Hard Ware Implementation

 

 

This software’s where Verilog source code can be used for design implementation.

 

Learning Outcomes

  • Basics of Digital Electronics
  • VLSI design Flow
  • Introduction to adders
  • Writing Verilog code.
  • Introduction to carry select adder.
  • Knowledge on Brent-kung adder.
  • Applications in real time

·         Xilinx tool for writing code, synthesis and simulation

·         Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation Skills

o   Thesis Writing Skills

 

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