Design of High Speed BCD Adder Using CMOS Technology

Project Code :TVMABE259

Objective

The focus on BCD arithmetic makes this design particularly relevant for applications dealing with decimal numbers and financial calculations.

Abstract

Decimal arithmetic gains its importance in different applications in the fields of finance and scientific applications. The approach of running decimal arithmetic over binary hardware requires conversions from decimal to binary and from binary to decimal. These conversions produce inexact results that impose financial losses for companies. Therefore, the need for decimal hardware is of high importance. This work proposes decimal addition circuits and presents their realization in complementary metal-oxide semiconductor (CMOS) technology. Tanner simulator software is used to simulate and verify the functionality of the proposed circuits. The circuits are simulated using 90nmm technologies and compared against existing works. This work also designed a fast BCD digit adder based on CMOS, which we then utilize to construct higher order BCD adders. Because it requires no corrections, the adder operates at a rapid speed. The experimental results show that proposed decimal adder achieves better performance.

Keywords: Addition circuits, BCD adders, CMOS, decimal arithmetic, decimal hardware, LTSPICE, PDP.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

· Tanner Tool

· Technology files: PTM 32nm HK

Hardware Requirements:

· Microsoft® Windows XP

· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

· 512 MB RAM

· 100 MB of available disk space

Learning Outcomes

Learning Outcomes:

· Understanding BCD Representation:

Grasp the concept of Binary-Coded Decimal (BCD) and its implications for digital addition.

· Circuit Design Principles:

Gain proficiency in designing full adders using CMOS technology and understand their functionality in the context of BCD addition.

· CMOS Implementation:

Learn to implement digital logic circuits using PMOS and NMOS transistors effectively, considering aspects such as pull-up and pull-down networks.

· Speed Optimization Technique:

Importance of Transistors

MOS Fundamentals
NMOS/PMOS/CMOS Technologies
Applications in Real time.

Tanner for design and simulation
Solution providing for real time problems

Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation skills
Thesis Writing Skills

Demo Video

https://youtu.be/4wWw8TkP2kI?si=z0iU-gnfReqM2OB4

Front End Domains

Cadence EDA
Finite State Machines
Arithmetic Core
DSP Core
Communications
Nano Technology
Testing

Back End Domains

Nano Technology
Cadence EDA
Low Power VLSI
Core Memories
Transistor Logic

Tools

FPGA
H-Spice
Cadence EDA
QCA
Xilinx Vivado
Xilinx ISE
Tanner EDA
LT-Spice

Others

Matlab Interfacing

H-Spice

LT-Spice