Design of High-Performance GDI Logic based 8-Tap FIR Filter at 22nm CMOS Technology using Array Multiplier

Over recent decades, there have been remarkable strides in Integrated Circuit (IC) technology, consistently shrinking circuit feature sizes and necessitating greater circuit density on each chip. Within the realm of digital circuit design, significant attention has turned to innovative circuits based on Gate-Diffusion Input (GDI) technology, celebrated for their lower power consumption and superior efficiency. GDI-based circuits emulate the functionality of CMOS transistors with fewer components while upholding performance and reliability. This paper explores the modeling and deployment of a Finite Impulse-Response (FIR) block constructed using GDI-based circuits alongside fundamental building blocks. In this endeavor, an eight-tap FIR architecture relying on GDI cells is established. The findings of this study affirm that even an eight-tap FIR design implemented with GDI technology yields notable benefits, including reduced power consumption and enhanced performance.