The main objective of this project is to reduce the power for LFSR and flipflop design by using reversible logic
In this project, Reversible logic has represented itself as a prominent technology which plays an important role in Quantum Computing. Theoretically Quantum Computers operates at high speed and consumes less power and area. As R launderer said if it use reversible circuits, then KTln2 power does not dissipate from the circuit in the form of heat. If there is no heat dissipation, energy will not be lost from the circuit. And another advantage of reversibility is, any input or output signal can be obtained at any stage. In this paper, some sequential circuits are designed using reversible logic. In reversible logic, the main problem is garbage outputs. By these garbage outputs, the delay constrains are increased. So in this paper, circuits are designed with fewer garbage outputs i.e., having less delay. Here in this paper, flip-flops, and LFSR are designed using reversible logic with fewer garbage outputs. The designs are constructed using Verilog HDL in RTL style. The effectiveness of the proposed method is synthesized and simulated using XilinxISE14.7/Xilinx Vivado.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

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