Design and Verification of APB Protocol

Project Code :TVMAFE804

Objective

The AMBA protocol comprises the Advanced Peripheral Bus (APB) component, designed for low-power, efficient communication between microprocessors and peripherals in mainstream System-on-Chip (SoC) designs. Its strength lies in simplicity, integration convenience, and low-latency communication making it the right choice for energy-sensitive applications

Abstract

Abstract: The AMBA protocol comprises the Advanced Peripheral Bus (APB) component, designed for low-power, efficient communication between microprocessors and peripherals in mainstream System-on-Chip (SoC) designs. Its strength lies in simplicity, integration convenience, and low-latency communication making it the right choice for energy-sensitive applications. Therefore, in this paper, the design and verification of the APB protocol have been discussed based on a Finite State Machine (FSM) model to give a broad overview of the various phases of operation of the standard and a structured implementation. Verification is completed using UVM to thoroughly check the functional and timing aspects of APB-based verification.

Keywords: - Advanced Peripheral Bus (APB), Finite State Machine (FSM), UVM (Universal Verification Methodology).

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

· Xilinx Vivado Tool

· HDL: Verilog

· Questa Sim Tool

Hardware Requirements:

· Microsoft® Windows XP,

· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

· 512 MB RAM

· 100 MB of available disk space

Learning Outcomes

Understand APB Architecture
Analyze APB Transactions
Identify Limitations of Existing Methods
Apply UVM Methodology
Design Reusable Verification Components

Demo Video

Front End Domains

Cadence EDA
Finite State Machines
Arithmetic Core
DSP Core
Communications
Nano Technology
Testing

Back End Domains

Nano Technology
Cadence EDA
Low Power VLSI
Core Memories
Transistor Logic

Tools

FPGA
H-Spice
Cadence EDA
QCA
Xilinx Vivado
Xilinx ISE
Tanner EDA
LT-Spice

Others

Matlab Interfacing

H-Spice

LT-Spice