Design and Implementation of Modified Carry Select Adder
Also Available Domains Communications
Objective
The main objective of this project is to design, implement, and analyze a Modified Carry Select Adder (MCSA) architecture to achieve high-speed and low-power arithmetic operation compared to the conventional Carry Select Adder. The project focuses on optimizing delay, area, and power by reducing redundant computations and improving carry propagation efficiency. The design will be modeled using HDL, simulated for functional correctness, and implemented on FPGA to validate performance improvements.
Abstract
Abstract:
The essential component for logical and arithmetic operations, a carry-choose adder is well-known for speeding up the arithmetic operations. To improve computational speed and efficiency, the current Carry Select Adder (CSLA) combines high-speed adder logics, including the Kogge Stone Adder and Carry Look-Ahead Adder. Better speed and lower energy consumption are achieved by the hybrid CSLA by using optimize the carry propagation network, the Brunt-Kung Adder is a kind of parallel prefix adder that outperforms the Kogge-Stone Adder. It is intended to offer a balance between area efficiency and speed. Although it has often fewer steps than the Kogge-Stone Adder, it nevertheless performs well. In a 64-bit Kogge Stone Adder, 1362 cells are present. Total power(nW) is 4642061.765. In Brunt Kung Adder, 1312 cells are present, and the total power is 4598331.278 (nW). In a Brunt Kung Adder, the total power is less compared to a Kogge Stone Adder. In Brunt Kung Adder, the percentage comparison of total power is 0.942%. The power delay product of the Brunt-Kung Adder is 19.8% less compared to the Kogge Stone Adder.NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
VIVADO 2018.3
Hardware Requirements:
· Microsoft® Windows XP
· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
· 512 MB RAM
· 100 MB of available disk space
Learning Outcomes
- Basics of Digital Electronics
- VLSI design Flow
- Applications in real time
· VIVADO for design and simulation
· Solution providing for real time problems
· Project Development Skills:
o Problem Analysis Skills
o Problem Solving Skills
o Logical Skills
o Designing Skills
o Testing Skills
o Debugging Skills
o Presentation Skills
o Thesis Writing Skills
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Disclaimer - Takeoff Edu Group Projects are not associated or affiliated with IEEE in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, not projects of or by IEEE.
