Design and Implementation of Floating Point FFT Processor using VHDL

Project Code :TVMAFE576

Objective

This paper describes two fused floating-point operations and applies them to the implementation of Fast Fourier Transform (FFT) processors using VHDL.

Block Diagram

Specifications

Software Requirements:

·         QCA designer

Hardware Requirements:

·         Microsoft® Windows XP

·         Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

·         512 MB RAM

·         100 MB of available disk space

Learning Outcomes

LEARNING OUTCOMES:

  • Basics of Digital Electronics.
  • Introduction to Verilog Coding.
  • Different modeling styles in Verilog.

o   Data Flow modeling.

o   Structural modeling.

o   Behavioral modeling.

o   Mixed level modeling.

·       About approximation computing.

  • Applications in real time.

·         Xilinx Vivado 2018.3/Xilinx ISE 14.7 Suite for design and simulation.

·         Generation of Netlist.

·         Solution providing for real time problems.

·         Project Development Skills:

o   Problem Analysis Skills.

o   Problem Solving Skills.

o   Logical Skills.

o   Designing Skills.

o   Testing Skills.

o   Debugging Skills.

o   Presentation Skills.

o   Thesis Writing Skills.

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