Design and Analysis of Voltage Controlled Oscillators in 45nm CMOS Process
Also Available Domains Tanner EDA|Cadence EDA
Objective
The major contribution of this work is to reduce the delay in Voltage Controlled Oscillators. For reducing the delay, the concept of Negative Skewed Delay (NSD) was designed for VCO.
Abstract
In this project, a Voltage Controlled Ring Oscillator, Current Starved Voltage Controlled Oscillator and Negative Skewed Oscillator are designed with system performance prioritized and layout design by considering their implementation in a Phase Locked Loop. Waveforms and parameters are compared at high performance and Layouts are designed with area under high priority. Layout Verification is done with Design Rule Check and Layout vs. Schematic Assura quality checks. All the designs are implemented in 45nm technology node using gpdk45 technology Cadence Virtuoso System Design Platform.
Keywords: Ring VCO, Current Starved VCO, Negative Skewed Oscillator, PLL, CMOS Inverter, Low Power.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Specifications
Software Requirements:
- Cadence Virtuoso
- Technology files:180nm
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
- Introduction to Voltage Controlled Oscillators
- Drawbacks in simple differential amplifier pairs
- Transistors & its applications
- Types of Transistors
- Logic Gates using Transistors
- Pull Up and Pull Down networks
- Importance of Transistors
- MOS Fundamentals
- NMOS/PMOS/CMOS Technologies
- How to design circuits using Transistor logic?
- Transistor level design for Voltage controlled oscillators
- How to design low power, high speed area efficient transistor level circuits?
- Scope of voltage-controlled oscillators in today’s world
- Applications in real time
- Cadence Virtuoso for design and simulation
- Solution providing for real time problems
- Project Development Skills:
- Problem Analysis Skills
- Problem Solving Skills
- Logical Skills
- Designing Skills
- Testing Skills
- Debugging Skills
- Presentation Skills
- Thesis Writing Skills
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Disclaimer - Takeoff Edu Group Projects are not associated or affiliated with IEEE in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, not projects of or by IEEE.
