Design and Analysis of Multiplier using Approximate 15-4 Compressor

Also Available Domains Arithmetic Core|Xilinx Vivado

Project Code :TVMATO581

Objective

This paper presents the design of approximate 15- 4 compressor using 5-3 compressors as basic module.

Abstract

This paper presents the design of approximate 15- 4 compressor using 5-3 compressors as basic module. Four different types of approximate 5-3 compressors are used in a 15-4 compressor for less power consumption and high pass rate. We have analysed the results in all the cases. A 16 _ 16 bit multiplier is simulated using the proposed 15-4 compressor. Simulation results show that the multipliers with proposed approximate compressors achieve significant improvement in power as compared to the multipliers with accurate 15-4 compressor. Pass rate of the proposed multipliers are high as compared to other existing approximate multipliers. Finally, the proposed multiplier is used in image processing applications where the peak signal to noise ratio (PSNR) of the image is measured. Quality of the image is compared with an accurate multiplier and the obtained results show that our proposed multiplier performs better than existing approximate multiplier.

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Specifications

Hardware requirement

            Processor           -    Pentium –III

 

Speed                               -    1.1 GHz

RAM                                 -    1 GB (min)

Hard Disk                        -   40 GB

Floppy Drive                     -    1.44 MB

Key Board                        -    Standard Windows Keyboard

Mouse-    Two or Three Button Mouse

Monitor    -    SVGA

Software requirements

v  Operating System            :Windows95/98/2000/XP/Windows7

v  Front End                          :   Modelsim 6.3 for Debugging and Xilinx 14.3 for                     Synthesis and Hard Ware Implementation

v  This software’s where Verilog source code can be used for design implementation.

Learning Outcomes

  • Basics of Digital Electronics
  • VLSI design Flow
  • Introduction to Verilog Coding
  • Different modeling styles in Verilog

o   Data Flow modeling

o   Structural modeling

o   Behavioral modeling

o   Mixed level modeling

  • Introduction to multiplier design
  • Knowledge on partial product generation and reduction
  • Knowledge on adders, compressors
  • About approximation computing
  • About Reversible logic
  • Applications in real time

·         Xilinx ISE 14.7/Xilinx Vivado2018.3 for design and simulation

·         Generation of Netlist.

·         Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation Skills

o   Thesis Writing Skills

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