Design and Analysis of Multi-Protocol Conversion Unit for SPI, I2C and UART

Project Code :TVMAFE636

Objective

This project is to design and develop a multi-protocol conversion unit that can seamlessly convert data between three widely used communication protocols: Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), and Universal Asynchronous Receiver-Transmitter (UART).

Abstract

The Multi-Protocol Conversion Unit (MPCU) is designed and simulated using Hardware Description Language (HDL). This unit serves as a bridge for data communication between three widely used serial communication protocols: Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), and Universal Asynchronous Receiver Transmitter (UART).The MPCU module accepts input from any of these three protocols along with a Conversion Select (COSE) signal, which determines the target protocol for data transmission. Based on the COSE value, the received data is transferred via the internal data bus within the MPCU to the selected protocol's slave device. The slave then processes the data and generates an 8-bit output.This approach eliminates the need for microprocessors or microcontrollers to handle protocol conversions, simplifying system design in prototyping and embedded applications. By dynamically adjusting the COSE value, data transfer between different protocols can be achieved seamlessly without additional processing overhead.Simulation results validate that the MPCU enables efficient data conversion between the masters and slaves of SPI, I2C, and UART protocols. This makes it highly useful for research, development, and device prototyping applications. Furthermore, the MPCU reduces the processing burden on microcontrollers, allowing them to focus on other tasks. Future enhancements could enable bidirectional data conversion, allowing data received by one slave to be transmitted to another slave using a different protocol within the MPCU framework.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

Β·         Xilinx ISE.

Hardware Requirements:

Β·         Digilent Basys-3 if Required.

Learning Outcomes

Β·         Verilog HDL concepts.

1.      Behavioural modelling.

2.      Always block.

3.      Case statements.

4.      Casex statements.

5.      Data-flow modelling.

6.      Assign statements.

7.      FSM concepts.

8.      Simple digital electronics concepts.

Demo Video

mail-banner
call-banner
contact-banner
Request Video