Design Analysis of Wallace Tree Based Multiplier Using Approximate Full Adder and Kogge Stone Adder

Also Available Domains Xilinx Vivado|Xilinx ISE

Project Code :TVMAFE362

Objective

The main objective of this work is to implement high speed Wallace tree multiplier by using compressor based adders and approximate full adders

Abstract

In this project, we are designing a Wallace tree multiplier using approximate full adder and Kogge stone adder. Multiplier is a crucial block of most of the digital arithmetic applications. With the advancement in the field of VLSI, achieving high speed and low power consumption has become a major concern for the designers. However, the operation of multiplication has been carried out by the process of shift and add method. Due to enhancement among the various adders, which covered the way of execution rate of the multipliers. Parallel multiplication algorithms often use combinational circuits and don’t contain feedback structures. In this project, the improvement in WTM using the KSA and the Modified Approximate Full Adder concepts is done.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

Xilinx ISE/Xilinx Vivado Tool
HDL: Verilog

Hardware Requirements:

Microsoft® Windows XP,
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Basics of Digital Electronics
FPGA design Flow
Introduction to Verilog Coding
Different modeling styles in Verilog

Data Flow modeling
Structural modeling
Behavioral modeling
Mixed level modeling

Combinational & Sequential circuits
Knowledge on Arithmetic circuits
Knowledge on multipliers
About Parallel prefix adders
Approximate full adder
Various compressors
Applications of multipliers in real time
Xilinx ISE / Xilinx Vivado for design and simulation
Generation of Netlist
Solution providing for real time problems
Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation Skills
Thesis Writing Skills

Demo Video

Front End Domains

Cadence EDA
Finite State Machines
Arithmetic Core
DSP Core
Communications
Nano Technology
Testing

Back End Domains

Nano Technology
Cadence EDA
Low Power VLSI
Core Memories
Transistor Logic

Tools

FPGA
H-Spice
Cadence EDA
QCA
Xilinx Vivado
Xilinx ISE
Tanner EDA
LT-Spice

Others

Matlab Interfacing

H-Spice

LT-Spice