Design an efficient error correction and detection of BK adder

In this project, Brent Kung parallel- prefix topology is implemented. It is a based on variable latency speculative adder and in this it utilizes the error detection network that reduces error probability compared to previous approaches. A variable latency adder employs speculation the exact arithmetic function is replaced with an approximated one that is faster and gives the correct result most of the time, but not always. In order to detect the error, error detection network is also used. The approximated adder is augmented with an error detection network that asserts an error signal when speculation fails. These are used to reduce computational delay compared to existing structures. Several variable latency speculative adders, for various operand lengths are used.