This work presents the design and implementation of a DNA-based full adder circuit constructed using simple and efficient AND logic blocks. With the growing demand for alternative computing paradigms beyond conventional CMOS technology, DNA computing has emerged as a promising approach due to its inherent parallelism, low power consumption, and high data storage capability
This work presents the design and implementation of a DNA-based full adder circuit constructed using simple and efficient AND logic blocks. With the growing demand for alternative computing paradigms beyond conventional CMOS technology, DNA computing has emerged as a promising approach due to its inherent parallelism, low power consumption, and high data storage capability. In the proposed design, basic logic operations are realized through DNA strand displacement and hybridization processes, where AND logic blocks act as the fundamental building units. The full adder circuit is developed by integrating these AND-based modules with complementary logic structures to generate accurate sum and carry outputs. The proposed architecture focuses on reducing reaction complexity, minimizing the number of DNA strands, and improving computational reliability. Simulation and theoretical analysis demonstrate enhanced efficiency, lower error rates, and reduced biochemical reactions compared to existing DNA-based logic circuits. This design is highly suitable for applications in molecular computing, bio-sensing systems, and nano-scale information processing.
Keywords
DNA Computing, Full Adder, AND Logic Block, Strand Displacement, Molecular Logic Circuits, Bio-Computing, Nanoelectronics
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Β· Tool Used: Cadence EDA tools for schematic and simulation
Β· Technology Node:180nm CMOS process.
Β· Design Elements: complementary compound pushβpull pair (PMOS + NMOS), input matching network, L1 & L2 (0.5 pHβ10 pH) inductors, high-value output load (RL, 100 kβ¦β1 Mβ¦), biasing/level-shift network, feedback/compensation path, input/output coupling and decoupling capacitors, thermal-stabilization circuitry, and symmetric/layout considerations for reduced mismatch
Β· Optimization Goal: minimize circuit complexity and parasitics (transistor and passive count) while preserving ultra-wideband large-signal gain, low output noise, high temperature stability, and linearity across the desired cutoff range (e.g., maintain cutoff from β18.21 kHz up to hundreds of GHz in simulation) with low power consumption (~69 mW)v
Understanding of DNA Computing Principles
β’ Design of Molecular Logic Circuits
β’ Implementation of Full Adder Using Biochemical Reactions
β’ Knowledge of Strand Displacement Mechanism
β’ Analysis of Reaction Efficiency and Error Reduction
β’ Exposure to Nano-Scale Computing Technologies