Also Available Domains Arithmetic Core|Xilinx Vivado
The main aim of this project is to implement and compare the High speed adders i.e. Parallel prefix adders
In this project, we are proposing various adder designs and comparison of those adders like Carry Look Ahead Adder, Brent Kung Adder, Kogge Stone Adder, Han-Carlson adder and Ladner Fischer Adder. Carry look ahead adder is known to be fast adder used in many data processing applications. The proposed designs are validated by implementing of 16-bit adder circuits. This proposed work evaluates the performance of proposed designs in terms of area, delay and power consumption and hardware overhead. The adders that have been compared in this paper are Carry Look Ahead Adder, Kogge Stone Adder, Brent kung adder, Han-Carlson adder and Ladner Fischer adder based on two basic aspects namely, number of slices i.e., area occupied, power and speed. The results are analyzed and compared with existing fast adder architectures to prove its efficiency. The synthesis and simulation can be done in Xilinx ISE 14.7 version tool.
Keywords: Verilog HDL, Carry Look Ahead adder, Parallel prefix adders like Brent Kung adder, Kogge stone adder and Ladner Fischer adder.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
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