Borrow Select Subtractor for Low Power and Area Efficiency

Also Available Domains Arithmetic Core|Xilinx ISE

Project Code :TVPGTO366

Objective

The main objective of this work is to increase the speed of processors but the processing speed of subtraction is limited by the sequential borrow bit. To overcome this problem by proposing two architectures of modified borrow select subtractor that consume lower power with increased area efficiency

Abstract

Adders and subtractors are important circuit modules in design of processors, which determine the speed of processors. The processing speed of subtraction is limited by the sequential borrow bit propagation from LSB to MSB, which in turn depends on the number of bits of operands (subtrahend and minuend). This paper presents two architectures of modified borrow select subtractor that consume lower power with increased area efficiency. The modifications carried out in the logical flow of subtraction process by using blocks with lower number of logic gates lead to a smaller number of gates, thus resulting in less device count, lower area and lower power dissipation.

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Block Diagram

Specifications

Software Requirements:

Xilinx Vivado
HDL: Verilog

Hardware Requirements:

Microsoft® Windows XP
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Basics of Digital Electronics
FPGA design Flow
Introduction to Verilog Coding
Different modeling styles in Verilog

Data Flow modeling
Structural modeling
Behavioral modeling
Mixed level modeling

Introduction to Borrow select subtractors
Different types of Borrow select adders

RBS
BSLS
BSLS-BLO
BSLS-RBS

Advantages of Borrow select subtractors
How to design High speed, Low power and Area Efficient Circuits
Scope of Borrow select subtractors in today’s world
Applications in real time
Xilinx Vivado for design and simulation
Generation of Netlist
Solution providing for real time problems
Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation Skills
Thesis Writing Skills

Demo Video

Front End Domains

DSP Core
Communications and Crypto Core
Design for Testability
Arithmetic Core
Nano Technology

Back End Domains

Nano Technology
Core Memories
Transistor Logic
Low Power VLSI

Tools

Cadence EDA
Xilinx Vivado
Xilinx ISE
Tanner EDA
FPGA

Others

Matlab Interfacing