Stochastic computing (SC) has emerged as an efficient paradigm for low-power, fault-tolerant processing in neural networks and image processing. SC uses bitstream-based stochastic sequences to represent probabilities, making it inherently resilient to noise and computational errors. However, the accuracy of SC operations depends significantly on the quality of these sequences, typically generated by linear feedback shift registers (LFSRs). This study analyzes the impact of different LFSR architectures—Fibonacci, Galois, and Mixed—on SC accuracy
Stochastic computing (SC) has emerged as an efficient paradigm for low-power, fault-tolerant processing in neural networks and image processing. SC uses bitstream-based stochastic sequences to represent probabilities, making it inherently resilient to noise and computational errors. However, the accuracy of SC operations depends significantly on the quality of these sequences, typically generated by linear feedback shift registers (LFSRs). This study analyzes the impact of different LFSR architectures—Fibonacci, Galois, and Mixed—on SC accuracy. Experiments revealed that Fibonacci LFSR achieved the lowest error rate, followed by Mixed and then Galois LFSR, which showed a significantly higher error rate. Additionally, results indicate that increasing the length of the stochastic sequence generally reduces the error rate across all LFSR types, while smaller operation results are associated with higher error rates.
Keywords: Stochastic Computing, LFSR, Fibonacci LFSR, Galois LFSR, Mixed LFSR, Error Rate, Neural Networks, Low Power
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Software Requirements
• Xilinx Vivado / ISE
• Verilog HDL / ModelSim
Hardware Requirements
• Xilinx FPGA (Spartan / Virtex)
• Logic Analyzer
• Stochastic Computing Fundamentals
• LFSR Architecture Design and Analysis
• Random Number Generation in VLSI
• Accuracy-Area Trade-offs in Approximate Computing
• Low Power Circuit Design Techniques