Analysis of Adiabatic Flip-flops for Ultra Low Power Applications

Also Available Domains Low Power VLSI|Tanner EDA|Cadence EDA

Project Code :TVPGBE45

Objective

The main objective of this project is to reduce the power consumption by adapting adiabatic and clock gating concepts for designing the flipflops

Abstract

In this project, adiabatic flip flops which are used for clocking in digital systems are proposed. The clocking scheme using energy recovery technique has already appeared as a successful and promising scheme for limiting power dissipation in ultra-low power digital systems.

Adiabatic flip flops are the key elements for this type of energy efficient adiabatic clocking scheme. The flip-flops are working in adiabatic principle.

Here in this work we have done the simulation and analyze the performance of two basic types of energy recovery flip flops. These are single ended conditional capturing flip-flop and differential conditional capturing flip flop. Both the flip-flops are utilizing energy recovery scheme.

For better comparison results we have also used clock gating scheme along with energy recovery technique.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

Cadence EDA
Technology files:180nm

Hardware Requirements:

Microsoft® Windows XP
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Introduction to Counters
Transistors & its applications

Types of Transistors
Logic Gates using Transistors
Pull Up and Pull Down networks
Importance of Transistors

MOS Fundamentals
NMOS/PMOS/CMOS Technologies
How to design circuits using Transistor logic?
Low Power technologies
Transistor level design for counters
Importance of static power consumption in lower technology nodes
Techniques for reducing static power consumption
How to design low power, high speed area efficient transistor level circuits?
Scope of Counters in today’s world
Applications in real time
Cadence Virtuoso for design and simulation
Solution providing for real time problems
Project Development Skills:
Problem Analysis Skills

Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation Skills
Thesis Writing Skills

Demo Video

Front End Domains

DSP Core
Communications and Crypto Core
Design for Testability
Arithmetic Core
Nano Technology

Back End Domains

Nano Technology
Core Memories
Transistor Logic
Low Power VLSI

Tools

Cadence EDA
Xilinx Vivado
Xilinx ISE
Tanner EDA
FPGA

Others

Matlab Interfacing