An Improved Distributed Multiplier-Less Approach for Radix-2 FFT
Also Available Domains DSP Core|Xilinx ISE
Objective
The main objective of this project is to reduce the area by replacing the multipliers with the use of adders and shifters. This paper is to implement for reducing the number of computations by integrating the computation of the radix-2 Fast Fourier Transform (FFT) with the Distributed Arithmetic (DA) and Complex Binary Number System (CBNS)
Abstract
In this project, a novel Scan-Based Logic Built-In Self-Test (LBIST) is proposed and it can be used to control the scan-shift power to an arbitrary level. High power consumption in LBIST, is a crucial issue that can cause over-testing, reliability degradation, chip damage.
The proposed method modifies pseudo-random patterns generated by an embedded test pattern generator (TPG) so that the modified patterns have the specific toggle rate without sacrificing fault coverage and test time. The effectiveness of the proposed design is synthesized and simulated using Xilinx Vivado software.
Keywords: Built-In-Self-Test (BIST), Linear Feedback Shift Register (LFSR), Test Pattern Generator, Scan design
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
- Xilinx Vivado
- HDL: Verilog
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
- Basics of Digital Electronics
- FPGA design Flow
- Introduction to Verilog Coding.
- Different modeling styles in Verilog
- Data Flow modeling
- Structural modeling
- Behavioral modeling
- Mixed level modeling
- Different types of FFT
- DIT-FFT
- DIF-FFT
- About Butterfly Processing Element
- FFT implementations
- Single-path Delay Commutator
- Multi-Path Delay Commutator
- Radix-2 & Radix-4 FFT architectures
- Applications in real time
- Xilinx Vivado for design and simulation
- Generation of Netlist
- Solution providing for real time problems
- Project Development Skills:
- Problem Analysis Skills
- Problem Solving Skills
- Logical Skills
- Designing Skills
- Testing Skills
- Debugging Skills
- Presentation Skills
- Thesis Writing Skills
Paper Publishing
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Disclaimer - Takeoff Edu Group Projects are not associated or affiliated with IEEE in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, not projects of or by IEEE.
