Also Available Domains Xilinx Vivado|Xilinx ISE
The aim of this project is to implement with three variants of approximate PDA-based structures based on an efficient truncation model. To achieve higher bit saving with relatively less truncation error, a novel approach was designed with approximate LUTs, ATs, and WSAT with truncated operands
Parallel Distributed Arithmetic forms are core of many important Digital Signal Processing (DSP) functions such as linear and circular convolutions, correlation, digital filtering, and discrete trigonometric transforms. In this project, a novel PDA-based structures is proposed based on efficient truncation model. A hardware-efficient fixed-width PDA-based inner-product structures was obtained by using approximate Look-Up Tables (LUTs), Adder Tree's (ATs), and Wallace-like Shift-AT (SAT) with truncated operands. In this project, three different inner product architectures is implemented based on their variants like area, delay etc.
Keywords: Approximate computation, Distributed Arithmetic (DA), Look Up Table, Adders.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

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